Increased the speed of both software and hardware TPI/PDI programming modes of the...
[pub/USBasp.git] / Projects / AVRISP-MKII / Lib / XPROG / XMEGANVM.c
1 /*
2 LUFA Library
3 Copyright (C) Dean Camera, 2010.
4
5 dean [at] fourwalledcubicle [dot] com
6 www.fourwalledcubicle.com
7 */
8
9 /*
10 Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
11
12 Permission to use, copy, modify, distribute, and sell this
13 software and its documentation for any purpose is hereby granted
14 without fee, provided that the above copyright notice appear in
15 all copies and that both that the copyright notice and this
16 permission notice and warranty disclaimer appear in supporting
17 documentation, and that the name of the author not be used in
18 advertising or publicity pertaining to distribution of the
19 software without specific, written prior permission.
20
21 The author disclaim all warranties with regard to this
22 software, including all implied warranties of merchantability
23 and fitness. In no event shall the author be liable for any
24 special, indirect or consequential damages or any damages
25 whatsoever resulting from loss of use, data or profits, whether
26 in an action of contract, negligence or other tortious action,
27 arising out of or in connection with the use or performance of
28 this software.
29 */
30
31 /** \file
32 *
33 * Target-related functions for the XMEGA target's NVM module.
34 */
35
36 #define INCLUDE_FROM_XMEGA_NVM_C
37 #include "XMEGANVM.h"
38
39 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
40
41 /** Sends the given 32-bit absolute address to the target.
42 *
43 * \param[in] AbsoluteAddress Absolute address to send to the target
44 */
45 static void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
46 {
47 /* Send the given 32-bit address to the target, LSB first */
48 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[0]);
49 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);
50 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[2]);
51 XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[3]);
52 }
53
54 /** Sends the given NVM register address to the target.
55 *
56 * \param[in] Register NVM register whose absolute address is to be sent
57 */
58 static void XMEGANVM_SendNVMRegAddress(const uint8_t Register)
59 {
60 /* Determine the absolute register address from the NVM base memory address and the NVM register address */
61 uint32_t Address = XPROG_Param_NVMBase | Register;
62
63 /* Send the calculated 32-bit address to the target, LSB first */
64 XMEGANVM_SendAddress(Address);
65 }
66
67 /** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
68 * calculation.
69 *
70 * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
71 */
72 bool XMEGANVM_WaitWhileNVMBusBusy(void)
73 {
74 /* Poll the STATUS register to check to see if NVM access has been enabled */
75 uint8_t TimeoutMSRemaining = 100;
76 while (TimeoutMSRemaining)
77 {
78 /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
79 XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
80 if (XPROGTarget_ReceiveByte() & PDI_STATUS_NVM)
81 return true;
82
83 /* Manage software timeout */
84 if (TIFR0 & (1 << OCF0A))
85 {
86 TIFR0 |= (1 << OCF0A);
87 TimeoutMSRemaining--;
88 }
89 }
90
91 return false;
92 }
93
94 /** Waits while the target's NVM controller is busy performing an operation, exiting if the
95 * timeout period expires.
96 *
97 * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
98 */
99 bool XMEGANVM_WaitWhileNVMControllerBusy(void)
100 {
101 /* Poll the NVM STATUS register while the NVM controller is busy */
102 uint8_t TimeoutMSRemaining = 100;
103 while (TimeoutMSRemaining)
104 {
105 /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */
106 XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
107 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);
108
109 /* Check to see if the BUSY flag is still set */
110 if (!(XPROGTarget_ReceiveByte() & (1 << 7)))
111 return true;
112
113 /* Manage software timeout */
114 if (TIFR0 & (1 << OCF0A))
115 {
116 TIFR0 |= (1 << OCF0A);
117 TimeoutMSRemaining--;
118 }
119 }
120
121 return false;
122 }
123
124 /** Retrieves the CRC value of the given memory space.
125 *
126 * \param[in] CRCCommand NVM CRC command to issue to the target
127 * \param[out] CRCDest CRC Destination when read from the target
128 *
129 * \return Boolean true if the command sequence complete successfully
130 */
131 bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
132 {
133 /* Wait until the NVM controller is no longer busy */
134 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
135 return false;
136
137 /* Set the NVM command to the correct CRC read command */
138 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
139 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
140 XPROGTarget_SendByte(CRCCommand);
141
142 /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
143 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
144 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
145 XPROGTarget_SendByte(1 << 0);
146
147 /* Wait until the NVM bus is ready again */
148 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
149 return false;
150
151 /* Wait until the NVM controller is no longer busy */
152 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
153 return false;
154
155 /* Load the PDI pointer register with the DAT0 register start address */
156 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
157 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);
158
159 /* Send the REPEAT command to grab the CRC bytes */
160 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
161 XPROGTarget_SendByte(XMEGA_CRC_LENGTH - 1);
162
163 /* Read in the CRC bytes from the target */
164 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
165 for (uint8_t i = 0; i < XMEGA_CRC_LENGTH; i++)
166 ((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte();
167
168 return true;
169 }
170
171 /** Reads memory from the target's memory spaces.
172 *
173 * \param[in] ReadAddress Start address to read from within the target's address space
174 * \param[out] ReadBuffer Buffer to store read data into
175 * \param[in] ReadSize Number of bytes to read
176 *
177 * \return Boolean true if the command sequence complete successfully
178 */
179 bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
180 {
181 /* Wait until the NVM controller is no longer busy */
182 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
183 return false;
184
185 /* Send the READNVM command to the NVM controller for reading of an arbitrary location */
186 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
187 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
188 XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM);
189
190 /* Load the PDI pointer register with the start address we want to read from */
191 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
192 XMEGANVM_SendAddress(ReadAddress);
193
194 /* Send the REPEAT command with the specified number of bytes to read */
195 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
196 XPROGTarget_SendByte(ReadSize - 1);
197
198 /* Send a LD command with indirect access and postincrement to read out the bytes */
199 XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
200 while (ReadSize--)
201 *(ReadBuffer++) = XPROGTarget_ReceiveByte();
202
203 return true;
204 }
205
206 /** Writes byte addressed memory to the target's memory spaces.
207 *
208 * \param[in] WriteCommand Command to send to the device to write each memory byte
209 * \param[in] WriteAddress Address to write to within the target's address space
210 * \param[in] Byte Byte to write to the target
211 *
212 * \return Boolean true if the command sequence complete successfully
213 */
214 bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t Byte)
215 {
216 /* Wait until the NVM controller is no longer busy */
217 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
218 return false;
219
220 /* Send the memory write command to the target */
221 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
222 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
223 XPROGTarget_SendByte(WriteCommand);
224
225 /* Send new memory byte to the memory to the target */
226 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
227 XMEGANVM_SendAddress(WriteAddress);
228 XPROGTarget_SendByte(Byte);
229
230 return true;
231 }
232
233 /** Writes page addressed memory to the target's memory spaces.
234 *
235 * \param[in] WriteBuffCommand Command to send to the device to write a byte to the memory page buffer
236 * \param[in] EraseBuffCommand Command to send to the device to erase the memory page buffer
237 * \param[in] WritePageCommand Command to send to the device to write the page buffer to the destination memory
238 * \param[in] PageMode Bitfield indicating what operations need to be executed on the specified page
239 * \param[in] WriteAddress Start address to write the page data to within the target's address space
240 * \param[in] WriteBuffer Buffer to source data from
241 * \param[in] WriteSize Number of bytes to write
242 *
243 * \return Boolean true if the command sequence complete successfully
244 */
245 bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,
246 const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,
247 const uint8_t* WriteBuffer, uint16_t WriteSize)
248 {
249 if (PageMode & XPRG_PAGEMODE_ERASE)
250 {
251 /* Wait until the NVM controller is no longer busy */
252 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
253 return false;
254
255 /* Send the memory buffer erase command to the target */
256 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
257 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
258 XPROGTarget_SendByte(EraseBuffCommand);
259
260 /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
261 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
262 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
263 XPROGTarget_SendByte(1 << 0);
264 }
265
266 if (WriteSize)
267 {
268 /* Wait until the NVM controller is no longer busy */
269 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
270 return false;
271
272 /* Send the memory buffer write command to the target */
273 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
274 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
275 XPROGTarget_SendByte(WriteBuffCommand);
276
277 /* Load the PDI pointer register with the start address we want to write to */
278 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
279 XMEGANVM_SendAddress(WriteAddress);
280
281 /* Send the REPEAT command with the specified number of bytes to write */
282 XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
283 XPROGTarget_SendByte(WriteSize - 1);
284
285 /* Send a ST command with indirect access and postincrement to write the bytes */
286 XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
287 while (WriteSize--)
288 XPROGTarget_SendByte(*(WriteBuffer++));
289 }
290
291 if (PageMode & XPRG_PAGEMODE_WRITE)
292 {
293 /* Wait until the NVM controller is no longer busy */
294 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
295 return false;
296
297 /* Send the memory write command to the target */
298 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
299 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
300 XPROGTarget_SendByte(WritePageCommand);
301
302 /* Send the address of the first page location to write the memory page */
303 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
304 XMEGANVM_SendAddress(WriteAddress);
305 XPROGTarget_SendByte(0x00);
306 }
307
308 return true;
309 }
310
311 /** Erases a specific memory space of the target.
312 *
313 * \param[in] EraseCommand NVM erase command to send to the device
314 * \param[in] Address Address inside the memory space to erase
315 *
316 * \return Boolean true if the command sequence complete successfully
317 */
318 bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)
319 {
320 /* Wait until the NVM controller is no longer busy */
321 if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
322 return false;
323
324 /* Send the memory erase command to the target */
325 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
326 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
327 XPROGTarget_SendByte(EraseCommand);
328
329 /* Chip erase is handled separately, since it's procedure is different to other erase types */
330 if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)
331 {
332 /* Set CMDEX bit in NVM CTRLA register to start the chip erase */
333 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
334 XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
335 XPROGTarget_SendByte(1 << 0);
336 }
337 else
338 {
339 /* Other erase modes just need us to address a byte within the target memory space */
340 XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
341 XMEGANVM_SendAddress(Address);
342 XPROGTarget_SendByte(0x00);
343 }
344
345 /* Wait until the NVM bus is ready again */
346 if (!(XMEGANVM_WaitWhileNVMBusBusy()))
347 return false;
348
349 return true;
350 }
351
352 #endif