X-Git-Url: http://git.linex4red.de/pub/lufa.git/blobdiff_plain/c73997429271e8566080ac8fdf21e5944c3b4c8e..24ca2d49fef526b95e6efcd3cdcbe38377ae4f02:/LUFA/Platform/XMEGA/ClockManagement.h diff --git a/LUFA/Platform/XMEGA/ClockManagement.h b/LUFA/Platform/XMEGA/ClockManagement.h index 07ba0e73c..1305d0e4b 100644 --- a/LUFA/Platform/XMEGA/ClockManagement.h +++ b/LUFA/Platform/XMEGA/ClockManagement.h @@ -263,14 +263,7 @@ const uint8_t Reference, const uint32_t Frequency) { - uint16_t DFLLCompare = (Frequency / 1024); - uint16_t DFFLCal = 0; - - if (Reference == DFLL_REF_INT_USBSOF) - { - NVM.CMD = NVM_CMD_READ_CALIB_ROW_gc; - DFFLCal = ((0x00 << 8) | pgm_read_byte(offsetof(NVM_PROD_SIGNATURES_t, USBRCOSC))); - } + uint16_t DFLLCompare = (Frequency / 1000); switch (Source) { @@ -278,16 +271,21 @@ OSC.DFLLCTRL |= (Reference << OSC_RC2MCREF_bp); DFLLRC2M.COMP1 = (DFLLCompare & 0xFF); DFLLRC2M.COMP2 = (DFLLCompare >> 8); - DFLLRC2M.CALA = (DFFLCal & 0xFF); - DFLLRC2M.CALB = (DFFLCal >> 8); DFLLRC2M.CTRL = DFLL_ENABLE_bm; break; case CLOCK_SRC_INT_RC32MHZ: OSC.DFLLCTRL |= (Reference << OSC_RC32MCREF_gp); DFLLRC32M.COMP1 = (DFLLCompare & 0xFF); DFLLRC32M.COMP2 = (DFLLCompare >> 8); - DFLLRC32M.CALA = (DFFLCal & 0xFF); - DFLLRC32M.CALB = (DFFLCal >> 8); + + if (Reference == DFLL_REF_INT_USBSOF) + { + NVM.CMD = NVM_CMD_READ_CALIB_ROW_gc; + DFLLRC32M.CALA = pgm_read_byte(offsetof(NVM_PROD_SIGNATURES_t, USBRCOSCA)); + DFLLRC32M.CALB = pgm_read_byte(offsetof(NVM_PROD_SIGNATURES_t, USBRCOSC)); + NVM.CMD = 0; + } + DFLLRC32M.CTRL = DFLL_ENABLE_bm; break; default: @@ -361,7 +359,7 @@ GlobalInterruptDisable(); CCP = CCP_IOREG_gc; - CLK.CTRL = ClockSourceMask; + CLK_CTRL = ClockSourceMask; SetGlobalInterruptMask(CurrentGlobalInt);