X-Git-Url: http://git.linex4red.de/pub/lufa.git/blobdiff_plain/5051df08d761acada01c4db4ee468e236245bc04..6fa8da4e561ee920f66ece42ce7e937a5399626d:/LUFA/Platform/UC3/ClockManagement.h diff --git a/LUFA/Platform/UC3/ClockManagement.h b/LUFA/Platform/UC3/ClockManagement.h index 3a46f9d75..51cb0ff6d 100644 --- a/LUFA/Platform/UC3/ClockManagement.h +++ b/LUFA/Platform/UC3/ClockManagement.h @@ -50,16 +50,16 @@ * Usage Example: * \code * #include - * + * * void main(void) * { * // Start the master external oscillator which will be used as the main clock reference * AVR32CLK_StartExternalOscillator(0, EXOSC_MODE_8MHZ_OR_MORE, EXOSC_START_0CLK); - * + * * // Start the PLL for the CPU clock, switch CPU to it * AVR32CLK_StartPLL(0, CLOCK_SRC_OSC0, 12000000, F_CPU); * AVR32CLK_SetCPUClockSource(CLOCK_SRC_PLL0, F_CPU); - * + * * // Start the PLL for the USB Generic Clock module * AVR32CLK_StartPLL(1, CLOCK_SRC_OSC0, 12000000, 48000000); * } @@ -91,16 +91,16 @@ EXOSC_MODE_8MHZ_OR_MORE = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3, /**< External crystal oscillator equal to or faster than 8MHz. */ }; - /** Enum for the possible external oscillator statup times. */ + /** Enum for the possible external oscillator startup times. */ enum UC3_Extern_OSC_ClockStartup_t { EXOSC_START_0CLK = AVR32_PM_OSCCTRL0_STARTUP_0_RCOSC, /**< Immediate startup, no delay. */ - EXOSC_START_64CLK = AVR32_PM_OSCCTRL0_STARTUP_64_RCOSC, /**< Wait 64 clock cyles before startup for stability. */ - EXOSC_START_128CLK = AVR32_PM_OSCCTRL0_STARTUP_128_RCOSC, /**< Wait 128 clock cyles before startup for stability. */ - EXOSC_START_2048CLK = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC, /**< Wait 2048 clock cyles before startup for stability. */ - EXOSC_START_4096CLK = AVR32_PM_OSCCTRL0_STARTUP_4096_RCOSC, /**< Wait 4096 clock cyles before startup for stability. */ - EXOSC_START_8192CLK = AVR32_PM_OSCCTRL0_STARTUP_8192_RCOSC, /**< Wait 8192 clock cyles before startup for stability. */ - EXOSC_START_16384CLK = AVR32_PM_OSCCTRL0_STARTUP_16384_RCOSC, /**< Wait 16384 clock cyles before startup for stability. */ + EXOSC_START_64CLK = AVR32_PM_OSCCTRL0_STARTUP_64_RCOSC, /**< Wait 64 clock cycles before startup for stability. */ + EXOSC_START_128CLK = AVR32_PM_OSCCTRL0_STARTUP_128_RCOSC, /**< Wait 128 clock cycles before startup for stability. */ + EXOSC_START_2048CLK = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC, /**< Wait 2048 clock cycles before startup for stability. */ + EXOSC_START_4096CLK = AVR32_PM_OSCCTRL0_STARTUP_4096_RCOSC, /**< Wait 4096 clock cycles before startup for stability. */ + EXOSC_START_8192CLK = AVR32_PM_OSCCTRL0_STARTUP_8192_RCOSC, /**< Wait 8192 clock cycles before startup for stability. */ + EXOSC_START_16384CLK = AVR32_PM_OSCCTRL0_STARTUP_16384_RCOSC, /**< Wait 16384 clock cycles before startup for stability. */ }; /** Enum for the possible module clock sources. */ @@ -162,7 +162,7 @@ /** Starts the given PLL of the UC3 microcontroller, with the given options. This routine blocks until the PLL is ready for use. * - * \note The output frequency must be equal to or greater than the source frequency. + * \attention The output frequency must be equal to or greater than the source frequency. * * \param[in] Channel Index of the PLL to start. * \param[in] Source Clock source for the PLL, a value from \ref UC3_System_ClockSource_t.