X-Git-Url: http://git.linex4red.de/pub/lufa.git/blobdiff_plain/0c2ad9eb349e1a5676468af3b407329dde4a53b4..24ca2d49fef526b95e6efcd3cdcbe38377ae4f02:/LUFA/Platform/XMEGA/ClockManagement.h diff --git a/LUFA/Platform/XMEGA/ClockManagement.h b/LUFA/Platform/XMEGA/ClockManagement.h index 62e9284d3..1305d0e4b 100644 --- a/LUFA/Platform/XMEGA/ClockManagement.h +++ b/LUFA/Platform/XMEGA/ClockManagement.h @@ -49,18 +49,18 @@ * * Usage Example: * \code - * #include - * - * void main(void) - * { - * // Start the internal 32MHz RC oscillator and switch the CPU core to run from it - * AVR32CLK_StartInternalOscillator(CLOCK_SRC_INT_RC32MHZ); - * XMEGACLK_SetCPUClockSource(CLOCK_SRC_INT_RC32MHZ, F_CPU); - * - * // Start the external oscillator and multiply up the frequency - * AVR32CLK_StartExternalOscillator(EXOSC_FREQ_9MHZ_MAX, EXOSC_START_1KCLK); - * AVR32CLK_StartPLL(CLOCK_SRC_XOSC, 8000000, F_USB); - * } + * #include + * + * void main(void) + * { + * // Start the PLL to multiply the 2MHz RC oscillator to 32MHz and switch the CPU core to run from it + * XMEGACLK_StartPLL(CLOCK_SRC_INT_RC2MHZ, 2000000, 32000000); + * XMEGACLK_SetCPUClockSource(CLOCK_SRC_PLL, F_CPU); + * + * // Start the 32MHz internal RC oscillator and start the DFLL to increase it to 48MHz using the USB SOF as a reference + * XMEGACLK_StartInternalOscillator(CLOCK_SRC_INT_RC32MHZ); + * XMEGACLK_StartDFLL(CLOCK_SRC_INT_RC32MHZ, DFLL_REF_INT_USBSOF, 48000000); + * } * \endcode * * @{ @@ -108,6 +108,14 @@ CLOCK_SRC_PLL = 4, /**< Clock sourced from the Internal PLL clock. */ }; + /** Enum for the possible DFLL clock reference sources. */ + enum XMEGA_System_DFLLReference_t + { + DFLL_REF_INT_RC32KHZ = 0, /**< Reference clock sourced from the Internal 32KHz RC Oscillator clock. */ + DFLL_REF_EXT_RC32KHZ = 1, /**< Reference clock sourced from the External 32KHz RC Oscillator clock connected to TOSC pins. */ + DFLL_REF_INT_USBSOF = 2, /**< Reference clock sourced from the USB Start Of Frame packets. */ + }; + /* Inline Functions: */ /** Starts the external oscillator of the XMEGA microcontroller, with the given options. This routine blocks until * the oscillator is ready for use. @@ -117,9 +125,9 @@ * * \return Boolean \c true if the external oscillator was successfully started, \c false if invalid parameters specified. */ - static inline bool AVR32CLK_StartExternalOscillator(const uint8_t FreqRange, + static inline bool XMEGACLK_StartExternalOscillator(const uint8_t FreqRange, const uint8_t Startup) ATTR_ALWAYS_INLINE; - static inline bool AVR32CLK_StartExternalOscillator(const uint8_t FreqRange, + static inline bool XMEGACLK_StartExternalOscillator(const uint8_t FreqRange, const uint8_t Startup) { OSC.XOSCCTRL = (FreqRange | ((Startup == EXOSC_START_32KCLK) ? OSC_X32KLPM_bm : 0) | Startup); @@ -130,8 +138,8 @@ } /** Stops the external oscillator of the XMEGA microcontroller. */ - static inline void AVR32CLK_StopExternalOscillator(void) ATTR_ALWAYS_INLINE; - static inline void AVR32CLK_StopExternalOscillator(void) + static inline void XMEGACLK_StopExternalOscillator(void) ATTR_ALWAYS_INLINE; + static inline void XMEGACLK_StopExternalOscillator(void) { OSC.CTRL &= ~OSC_XOSCEN_bm; } @@ -143,8 +151,8 @@ * * \return Boolean \c true if the internal oscillator was successfully started, \c false if invalid parameters specified. */ - static inline uint8_t AVR32CLK_StartInternalOscillator(const uint8_t Source) ATTR_ALWAYS_INLINE; - static inline uint8_t AVR32CLK_StartInternalOscillator(const uint8_t Source) + static inline uint8_t XMEGACLK_StartInternalOscillator(const uint8_t Source) ATTR_ALWAYS_INLINE; + static inline uint8_t XMEGACLK_StartInternalOscillator(const uint8_t Source) { switch (Source) { @@ -171,8 +179,8 @@ * * \return Boolean \c true if the internal oscillator was successfully stopped, \c false if invalid parameters specified. */ - static inline bool AVR32CLK_StopInternalOscillator(const uint8_t Source) ATTR_ALWAYS_INLINE; - static inline bool AVR32CLK_StopInternalOscillator(const uint8_t Source) + static inline bool XMEGACLK_StopInternalOscillator(const uint8_t Source) ATTR_ALWAYS_INLINE; + static inline bool XMEGACLK_StopInternalOscillator(const uint8_t Source) { switch (Source) { @@ -200,10 +208,10 @@ * * \return Boolean \c true if the PLL was successfully started, \c false if invalid parameters specified. */ - static inline bool AVR32CLK_StartPLL(const uint8_t Source, + static inline bool XMEGACLK_StartPLL(const uint8_t Source, const uint32_t SourceFreq, const uint32_t Frequency) ATTR_ALWAYS_INLINE; - static inline bool AVR32CLK_StartPLL(const uint8_t Source, + static inline bool XMEGACLK_StartPLL(const uint8_t Source, const uint32_t SourceFreq, const uint32_t Frequency) { @@ -234,12 +242,83 @@ } /** Stops the PLL of the XMEGA microcontroller. */ - static inline void AVR32CLK_StopPLL(void) ATTR_ALWAYS_INLINE; - static inline void AVR32CLK_StopPLL(void) + static inline void XMEGACLK_StopPLL(void) ATTR_ALWAYS_INLINE; + static inline void XMEGACLK_StopPLL(void) { OSC.CTRL &= ~OSC_PLLEN_bm; } + /** Starts the DFLL of the XMEGA microcontroller, with the given options. + * + * \param[in] Source RC Clock source for the DFLL, a value from \ref XMEGA_System_ClockSource_t. + * \param[in] Reference Reference clock source for the DFLL, an value from \ref XMEGA_System_DFLLReference_t + * \param[in] Frequency Target frequency of the DFLL's output. + * + * \return Boolean \c true if the DFLL was successfully started, \c false if invalid parameters specified. + */ + static inline bool XMEGACLK_StartDFLL(const uint8_t Source, + const uint8_t Reference, + const uint32_t Frequency) ATTR_ALWAYS_INLINE; + static inline bool XMEGACLK_StartDFLL(const uint8_t Source, + const uint8_t Reference, + const uint32_t Frequency) + { + uint16_t DFLLCompare = (Frequency / 1000); + + switch (Source) + { + case CLOCK_SRC_INT_RC2MHZ: + OSC.DFLLCTRL |= (Reference << OSC_RC2MCREF_bp); + DFLLRC2M.COMP1 = (DFLLCompare & 0xFF); + DFLLRC2M.COMP2 = (DFLLCompare >> 8); + DFLLRC2M.CTRL = DFLL_ENABLE_bm; + break; + case CLOCK_SRC_INT_RC32MHZ: + OSC.DFLLCTRL |= (Reference << OSC_RC32MCREF_gp); + DFLLRC32M.COMP1 = (DFLLCompare & 0xFF); + DFLLRC32M.COMP2 = (DFLLCompare >> 8); + + if (Reference == DFLL_REF_INT_USBSOF) + { + NVM.CMD = NVM_CMD_READ_CALIB_ROW_gc; + DFLLRC32M.CALA = pgm_read_byte(offsetof(NVM_PROD_SIGNATURES_t, USBRCOSCA)); + DFLLRC32M.CALB = pgm_read_byte(offsetof(NVM_PROD_SIGNATURES_t, USBRCOSC)); + NVM.CMD = 0; + } + + DFLLRC32M.CTRL = DFLL_ENABLE_bm; + break; + default: + return false; + } + + return true; + } + + /** Stops the given DFLL of the XMEGA microcontroller. + * + * \param[in] Source RC Clock source for the DFLL to be stopped, a value from \ref XMEGA_System_ClockSource_t. + * + * \return Boolean \c true if the DFLL was successfully stopped, \c false if invalid parameters specified. + */ + static inline bool XMEGACLK_StopDFLL(const uint8_t Source) ATTR_ALWAYS_INLINE; + static inline bool XMEGACLK_StopDFLL(const uint8_t Source) + { + switch (Source) + { + case CLOCK_SRC_INT_RC2MHZ: + DFLLRC2M.CTRL = 0; + break; + case CLOCK_SRC_INT_RC32MHZ: + DFLLRC32M.CTRL = 0; + break; + default: + return false; + } + + return true; + } + /** Sets the clock source for the main microcontroller core. The given clock source should be configured * and ready for use before this function is called. * @@ -280,7 +359,7 @@ GlobalInterruptDisable(); CCP = CCP_IOREG_gc; - CLK.CTRL = ClockSourceMask; + CLK_CTRL = ClockSourceMask; SetGlobalInterruptMask(CurrentGlobalInt);