\r
/** \file\r
*\r
- * Header file for NVMTarget.c.\r
+ * Header file for XMEGANVM.c.\r
*/\r
\r
-#ifndef _NVM_TARGET_\r
-#define _NVM_TARGET_\r
+#ifndef _XMEGA_NVM__\r
+#define _XMEGA_NVM_\r
\r
/* Includes: */\r
#include <avr/io.h>\r
#endif\r
\r
/* Defines: */\r
- #define NVM_BUSY_TIMEOUT_MS 200\r
+ #define XMEGA_NVM_BUSY_TIMEOUT_MS 200\r
\r
- #define NVM_REG_ADDR0 0x00\r
- #define NVM_REG_ADDR1 0x01\r
- #define NVM_REG_ADDR2 0x02\r
- #define NVM_REG_DAT0 0x04\r
- #define NVM_REG_DAT1 0x05\r
- #define NVM_REG_DAT2 0x06\r
- #define NVM_REG_CMD 0x0A\r
- #define NVM_REG_CTRLA 0x0B\r
- #define NVM_REG_CTRLB 0x0C\r
- #define NVM_REG_INTCTRL 0x0D\r
- #define NVM_REG_STATUS 0x0F\r
- #define NVM_REG_LOCKBITS 0x10\r
+ #define XMEGA_NVM_REG_ADDR0 0x00\r
+ #define XMEGA_NVM_REG_ADDR1 0x01\r
+ #define XMEGA_NVM_REG_ADDR2 0x02\r
+ #define XMEGA_NVM_REG_DAT0 0x04\r
+ #define XMEGA_NVM_REG_DAT1 0x05\r
+ #define XMEGA_NVM_REG_DAT2 0x06\r
+ #define XMEGA_NVM_REG_CMD 0x0A\r
+ #define XMEGA_NVM_REG_CTRLA 0x0B\r
+ #define XMEGA_NVM_REG_CTRLB 0x0C\r
+ #define XMEGA_NVM_REG_INTCTRL 0x0D\r
+ #define XMEGA_NVM_REG_STATUS 0x0F\r
+ #define XMEGA_NVM_REG_LOCKBITS 0x10\r
\r
- #define NVM_CMD_NOOP 0x00\r
- #define NVM_CMD_CHIPERASE 0x40\r
- #define NVM_CMD_READNVM 0x43\r
- #define NVM_CMD_LOADFLASHPAGEBUFF 0x23\r
- #define NVM_CMD_ERASEFLASHPAGEBUFF 0x26\r
- #define NVM_CMD_ERASEFLASHPAGE 0x2B\r
- #define NVM_CMD_WRITEFLASHPAGE 0x2E\r
- #define NVM_CMD_ERASEWRITEFLASH 0x2F\r
- #define NVM_CMD_FLASHCRC 0x78\r
- #define NVM_CMD_ERASEAPPSEC 0x20\r
- #define NVM_CMD_ERASEAPPSECPAGE 0x22\r
- #define NVM_CMD_WRITEAPPSECPAGE 0x24\r
- #define NVM_CMD_ERASEWRITEAPPSECPAGE 0x25\r
- #define NVM_CMD_APPCRC 0x38\r
- #define NVM_CMD_ERASEBOOTSEC 0x68\r
- #define NVM_CMD_ERASEBOOTSECPAGE 0x2A\r
- #define NVM_CMD_WRITEBOOTSECPAGE 0x2C\r
- #define NVM_CMD_ERASEWRITEBOOTSECPAGE 0x2D\r
- #define NVM_CMD_BOOTCRC 0x39\r
- #define NVM_CMD_READUSERSIG 0x03\r
- #define NVM_CMD_ERASEUSERSIG 0x18\r
- #define NVM_CMD_WRITEUSERSIG 0x1A\r
- #define NVM_CMD_READCALIBRATION 0x02\r
- #define NVM_CMD_READFUSE 0x07\r
- #define NVM_CMD_WRITEFUSE 0x4C\r
- #define NVM_CMD_WRITELOCK 0x08\r
- #define NVM_CMD_LOADEEPROMPAGEBUFF 0x33\r
- #define NVM_CMD_ERASEEEPROMPAGEBUFF 0x36\r
- #define NVM_CMD_ERASEEEPROM 0x30\r
- #define NVM_CMD_ERASEEEPROMPAGE 0x32\r
- #define NVM_CMD_WRITEEEPROMPAGE 0x34\r
- #define NVM_CMD_ERASEWRITEEEPROMPAGE 0x35\r
- #define NVM_CMD_READEEPROM 0x06\r
+ #define XMEGA_NVM_CMD_NOOP 0x00\r
+ #define XMEGA_NVM_CMD_CHIPERASE 0x40\r
+ #define XMEGA_NVM_CMD_READNVM 0x43\r
+ #define XMEGA_NVM_CMD_LOADFLASHPAGEBUFF 0x23\r
+ #define XMEGA_NVM_CMD_ERASEFLASHPAGEBUFF 0x26\r
+ #define XMEGA_NVM_CMD_ERASEFLASHPAGE 0x2B\r
+ #define XMEGA_NVM_CMD_WRITEFLASHPAGE 0x2E\r
+ #define XMEGA_NVM_CMD_ERASEWRITEFLASH 0x2F\r
+ #define XMEGA_NVM_CMD_FLASHCRC 0x78\r
+ #define XMEGA_NVM_CMD_ERASEAPPSEC 0x20\r
+ #define XMEGA_NVM_CMD_ERASEAPPSECPAGE 0x22\r
+ #define XMEGA_NVM_CMD_WRITEAPPSECPAGE 0x24\r
+ #define XMEGA_NVM_CMD_ERASEWRITEAPPSECPAGE 0x25\r
+ #define XMEGA_NVM_CMD_APPCRC 0x38\r
+ #define XMEGA_NVM_CMD_ERASEBOOTSEC 0x68\r
+ #define XMEGA_NVM_CMD_ERASEBOOTSECPAGE 0x2A\r
+ #define XMEGA_NVM_CMD_WRITEBOOTSECPAGE 0x2C\r
+ #define XMEGA_NVM_CMD_ERASEWRITEBOOTSECPAGE 0x2D\r
+ #define XMEGA_NVM_CMD_BOOTCRC 0x39\r
+ #define XMEGA_NVM_CMD_READUSERSIG 0x03\r
+ #define XMEGA_NVM_CMD_ERASEUSERSIG 0x18\r
+ #define XMEGA_NVM_CMD_WRITEUSERSIG 0x1A\r
+ #define XMEGA_NVM_CMD_READCALIBRATION 0x02\r
+ #define XMEGA_NVM_CMD_READFUSE 0x07\r
+ #define XMEGA_NVM_CMD_WRITEFUSE 0x4C\r
+ #define XMEGA_NVM_CMD_WRITELOCK 0x08\r
+ #define XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF 0x33\r
+ #define XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF 0x36\r
+ #define XMEGA_NVM_CMD_ERASEEEPROM 0x30\r
+ #define XMEGA_NVM_CMD_ERASEEEPROMPAGE 0x32\r
+ #define XMEGA_NVM_CMD_WRITEEEPROMPAGE 0x34\r
+ #define XMEGA_NVM_CMD_ERASEWRITEEEPROMPAGE 0x35\r
+ #define XMEGA_NVM_CMD_READEEPROM 0x06\r
\r
/* Function Prototypes: */\r
- void NVMTarget_SendNVMRegAddress(const uint8_t Register);\r
- void NVMTarget_SendAddress(const uint32_t AbsoluteAddress);\r
- bool NVMTarget_WaitWhileNVMControllerBusy(void);\r
- bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);\r
- bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);\r
- bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer);\r
- bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
- const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
- const uint8_t* WriteBuffer, const uint16_t WriteSize);\r
- bool NVMTarget_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);\r
+ void XMEGANVM_SendNVMRegAddress(const uint8_t Register);\r
+ void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress);\r
+ bool XMEGANVM_WaitWhileNVMControllerBusy(void);\r
+ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest);\r
+ bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize);\r
+ bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer);\r
+ bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
+ const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
+ const uint8_t* WriteBuffer, const uint16_t WriteSize);\r
+ bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address);\r
\r
#endif\r
projects / pub / lufa.git / blobdiff