Complete initial revision of the XMEGA Clock Management platform driver.

[pub/lufa.git] / LUFA / Platform / UC3 / ClockManagement.h

diff --git a/LUFA/Platform/UC3/ClockManagement.h b/LUFA/Platform/UC3/ClockManagement.h
index d6fac35..125a8a9 100644 (file)
--- a/LUFA/Platform/UC3/ClockManagement.h
+++ b/LUFA/Platform/UC3/ClockManagement.h
@@ -123,12 +123,12 @@
                         *\r
                         *  \return Boolean \c true if the external oscillator was successfully started, \c false if invalid parameters specified.\r
                         */\r
-                       static inline uint8_t AVR32CLK_StartExternalOscillator(const uint8_t Channel,\r
-                                                                              const uint8_t Type,\r
-                                                                              const uint8_t Startup) ATTR_ALWAYS_INLINE;\r
-                       static inline uint8_t AVR32CLK_StartExternalOscillator(const uint8_t Channel,\r
-                                                                              const uint8_t Type,\r
-                                                                              const uint8_t Startup)\r
+                       static inline bool AVR32CLK_StartExternalOscillator(const uint8_t Channel,\r
+                                                                           const uint8_t Type,\r
+                                                                           const uint8_t Startup) ATTR_ALWAYS_INLINE;\r
+                       static inline bool AVR32CLK_StartExternalOscillator(const uint8_t Channel,\r
+                                                                           const uint8_t Type,\r
+                                                                           const uint8_t Startup)\r
                        {\r
                                switch (Channel)\r
                                {\r
@@ -162,6 +162,8 @@
 \r
                        /** Starts the given PLL of the UC3 microcontroller, with the given options. This routine blocks until the PLL is ready for use.\r
                         *\r
+                        *  \note The output frequency must be equal to or greater than the source frequency.\r
+                        *\r
                         *  \param[in] Channel     Index of the PLL to start.\r
                         *  \param[in] Source      Clock source for the PLL, a value from \ref UC3_System_ClockSource_t.\r
                         *  \param[in] SourceFreq  Frequency of the PLL's clock source, in Hz.\r
@@ -178,6 +180,9 @@
                                                             const uint32_t SourceFreq,\r
                                                             const uint32_t Frequency)\r
                        {\r
+                               if (SourceFreq > Frequency)\r
+                                 return false;\r
+                       \r
                                switch (Source)\r
                                {\r
                                        case CLOCK_SRC_OSC0:\r