Use auto-detection of project directories for the demo, project and bootloader makefiles.

[pub/lufa.git] / Projects / AVRISP-MKII / Lib / XPROG / XPROGTarget.c

diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
index 0a2dee7..5ea9404 100644 (file)
--- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
+++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
@@ -1,13 +1,13 @@
 /*
              LUFA Library
 /*
              LUFA Library

-     Copyright (C) Dean Camera, 2011.
+     Copyright (C) Dean Camera, 2012.

 
   dean [at] fourwalledcubicle [dot] com
            www.lufa-lib.org
 */
 
 /*
 
   dean [at] fourwalledcubicle [dot] com
            www.lufa-lib.org
 */
 
 /*

-  Copyright 2011  Dean Camera (dean [at] fourwalledcubicle [dot] com)
+  Copyright 2012  Dean Camera (dean [at] fourwalledcubicle [dot] com)

 
   Permission to use, copy, modify, distribute, and sell this
   software and its documentation for any purpose is hereby granted
 
   Permission to use, copy, modify, distribute, and sell this
   software and its documentation for any purpose is hereby granted


@@ -78,7 +78,7 @@ void XPROGTarget_EnableTargetTPI(void)
        DDRD |=  (1 << 5) | (1 << 3);
        DDRD &= ~(1 << 2);
 
        DDRD |=  (1 << 5) | (1 << 3);
        DDRD &= ~(1 << 2);
 

-       /* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */
+       /* Set up the synchronous USART for TPI communications - 8 data bits, even parity, 2 stop bits */

        UBRR1  = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1);
        UCSR1B = (1 << TXEN1);
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
        UBRR1  = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1);
        UCSR1B = (1 << TXEN1);
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);


@@ -92,7 +92,8 @@ void XPROGTarget_EnableTargetTPI(void)
 void XPROGTarget_DisableTargetPDI(void)
 {
        /* Switch to Rx mode to ensure that all pending transmissions are complete */
 void XPROGTarget_DisableTargetPDI(void)
 {
        /* Switch to Rx mode to ensure that all pending transmissions are complete */

-       XPROGTarget_SetRxMode();
+       if (IsSending)
+         XPROGTarget_SetRxMode();

 
        /* Turn off receiver and transmitter of the USART, clear settings */
        UCSR1A  = ((1 << TXC1) | (1 << RXC1));
 
        /* Turn off receiver and transmitter of the USART, clear settings */
        UCSR1A  = ((1 << TXC1) | (1 << RXC1));


@@ -108,7 +109,8 @@ void XPROGTarget_DisableTargetPDI(void)
 void XPROGTarget_DisableTargetTPI(void)
 {
        /* Switch to Rx mode to ensure that all pending transmissions are complete */
 void XPROGTarget_DisableTargetTPI(void)
 {
        /* Switch to Rx mode to ensure that all pending transmissions are complete */

-       XPROGTarget_SetRxMode();
+       if (IsSending)
+         XPROGTarget_SetRxMode();

 
        /* Turn off receiver and transmitter of the USART, clear settings */
        UCSR1A |= (1 << TXC1) | (1 << RXC1);
 
        /* Turn off receiver and transmitter of the USART, clear settings */
        UCSR1A |= (1 << TXC1) | (1 << RXC1);


@@ -118,7 +120,7 @@ void XPROGTarget_DisableTargetTPI(void)
        /* Set all USART lines as inputs, tristate */
        DDRD  &= ~((1 << 5) | (1 << 3));
        PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
        /* Set all USART lines as inputs, tristate */
        DDRD  &= ~((1 << 5) | (1 << 3));
        PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));

-       
+

        /* Tristate target /RESET line */
        AUX_LINE_DDR  &= ~AUX_LINE_MASK;
        AUX_LINE_PORT &= ~AUX_LINE_MASK;
        /* Tristate target /RESET line */
        AUX_LINE_DDR  &= ~AUX_LINE_MASK;
        AUX_LINE_PORT &= ~AUX_LINE_MASK;


@@ -140,7 +142,7 @@ void XPROGTarget_SendByte(const uint8_t Byte)
        UDR1    = Byte;
 }
 
        UDR1    = Byte;
 }
 

-/** Receives a byte via the software USART, blocking until data is received.
+/** Receives a byte via the hardware USART, blocking until data is received or timeout expired.

  *
  *  \return Received byte from the USART
  */
  *
  *  \return Received byte from the USART
  */


@@ -151,7 +153,7 @@ uint8_t XPROGTarget_ReceiveByte(void)
          XPROGTarget_SetRxMode();
 
        /* Wait until a byte has been received before reading */
          XPROGTarget_SetRxMode();
 
        /* Wait until a byte has been received before reading */

-       while (!(UCSR1A & (1 << RXC1)) && !(TimeoutExpired));
+       while (!(UCSR1A & (1 << RXC1)) && TimeoutTicksRemaining);

 
        return UDR1;
 }
 
        return UDR1;
 }


@@ -162,13 +164,14 @@ void XPROGTarget_SendIdle(void)
        /* Switch to Tx mode if currently in Rx mode */
        if (!(IsSending))
          XPROGTarget_SetTxMode();
        /* Switch to Tx mode if currently in Rx mode */
        if (!(IsSending))
          XPROGTarget_SetTxMode();

-       
+

        /* Need to do nothing for a full frame to send an IDLE */
        for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
        {
                /* Wait for a full cycle of the clock */
                while (PIND & (1 << 5));
                while (!(PIND & (1 << 5)));
        /* Need to do nothing for a full frame to send an IDLE */
        for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
        {
                /* Wait for a full cycle of the clock */
                while (PIND & (1 << 5));
                while (!(PIND & (1 << 5)));

+               while (PIND & (1 << 5));

        }
 }
 
        }
 }
 


@@ -177,6 +180,7 @@ static void XPROGTarget_SetTxMode(void)
        /* Wait for a full cycle of the clock */
        while (PIND & (1 << 5));
        while (!(PIND & (1 << 5)));
        /* Wait for a full cycle of the clock */
        while (PIND & (1 << 5));
        while (!(PIND & (1 << 5)));

+       while (PIND & (1 << 5));

 
        PORTD  |=  (1 << 3);
        DDRD   |=  (1 << 3);
 
        PORTD  |=  (1 << 3);
        DDRD   |=  (1 << 3);