+++ /dev/null
-/*\r
-\r
- soft_uart\r
-\r
- v0.2\r
-\r
- Copyright John Steggall 2009\r
-\r
-*/\r
-\r
-/*\r
- Copyright 2009 John Steggall (steggall.j@gmail.com)\r
-\r
- Permission to use, copy, modify, and distribute this software\r
- and its documentation for any purpose and without fee is hereby\r
- granted, provided that the above copyright notice appear in all\r
- copies and that both that the copyright notice and this\r
- permission notice and warranty disclaimer appear in supporting\r
- documentation, and that the name of the author not be used in\r
- advertising or publicity pertaining to distribution of the\r
- software without specific, written prior permission.\r
-\r
- The author disclaim all warranties with regard to this\r
- software, including all implied warranties of merchantability\r
- and fitness. In no event shall the author be liable for any\r
- special, indirect or consequential damages or any damages\r
- whatsoever resulting from loss of use, data or profits, whether\r
- in an action of contract, negligence or other tortious action,\r
- arising out of or in connection with the use or performance of\r
- this software.\r
-*/\r
-\r
-#ifndef UART_SOFT_CONF\r
-#define UART_SOFT_CONF\r
-\r
- #define BITLENGTH 833 // Length of data bit, worked out by F_CPU/desired baud\r
-\r
- #define TXPIN 1 // Port pin TX is connected to\r
- #define RXPIN 0 // Port pin RX is connected to\r
-\r
- /* PORT setup */\r
- #define RXPORT 0x09 // RX port selection\r
- #define TXPORT 0x0B // TX port selection\r
- #define TXDIR_REG 0x0A // Data direction port for TX pin\r
-\r
- /* RX pin setup */\r
- #define EXTI_FLAG_REG 0x1C\r
- #define EXTI_MASK_REG 0x1D\r
- #define EXTI_MASK_BIT 0\r
-\r
- #define RX_PIN_INT INT0_vect // external interrupt vector for RX pin\r
- #define RX_INT_vect TIMER3_COMPC_vect // interrupt vector for OCRnC\r
- #define TX_INT_vect TIMER3_COMPB_vect // interrupt vector for OCRnB\r
-\r
- #define TC_INT_MASK_REG TIMSK3 // interrupt timer mask register for timer(n)\r
- #define TC_COUNTL TCNT3L // count high register for timer(n)\r
- #define TC_COUNTH TCNT3H // count low register for timer(n)\r
-\r
- /* Reciever setup */\r
- #define TC_RX_COMPEN OCIE3C // interrupt enable for OCRnC (RX bit timer)\r
- #define TC_RX_COMPH OCR3CH // OCRnC compare match high register\r
- #define TC_RX_COMPL OCR3CL // OCRnC compare match high register\r
-\r
- /* Transmitter setup */\r
- #define TC_TX_COMPEN OCIE3B // interrupt enable for OCRnB (TX bit timer)\r
- #define TC_TX_COMPH OCR3BH // OCRnB compare match high register\r
- #define TC_TX_COMPL OCR3BL // OCRnB compare match low register\r
-\r
- #define TC_CTRLB TCCR3B // timer(n) control register B\r
-\r
- #define TC_INTFLAG_REG 0x18 // timer(n) interupt flag register\r
- #define TC_TX_IF_BIT OCIE3B // timer(n) interrupt flag bit for OCRnB\r
- #define TC_RX_IF_BIT OCIE3C // timer(n) interrupt flag bit for OCRnC\r
-\r
-#endif\r