From: Dean Camera <dean@fourwalledcubicle.com>
Date: Wed, 12 Oct 2011 02:27:22 +0000 (+0000)
Subject: When automatic PLL management mode is enabled on the U4 series AVR8 chips, the PLL... 
X-Git-Tag: LUFA-120219~60
X-Git-Url: http://git.linex4red.de/pub/USBasp.git/commitdiff_plain/c15eaa5dae5b8913d9401f0ad508494a6b66744a

When automatic PLL management mode is enabled on the U4 series AVR8 chips, the PLL is now configured for 48MHz and not a divided 96MHz, to lower power consumption and to keep the system within the datasheet specs for 3.3V operation (thanks to Scott Vitale).
---

diff --git a/LUFA/Drivers/USB/Core/AVR8/USBController_AVR8.c b/LUFA/Drivers/USB/Core/AVR8/USBController_AVR8.c
index 571ab6c8a..9f688db06 100644
--- a/LUFA/Drivers/USB/Core/AVR8/USBController_AVR8.c
+++ b/LUFA/Drivers/USB/Core/AVR8/USBController_AVR8.c
@@ -68,7 +68,7 @@ void USB_Init(
 	if (!(USB_Options & USB_OPT_MANUAL_PLL))
 	{
 		#if defined(USB_SERIES_4_AVR)
-		PLLFRQ = ((1 << PLLUSB) | (1 << PDIV3) | (1 << PDIV1));
+		PLLFRQ = (1 << PDIV2);
 		#endif
 	}
 
diff --git a/LUFA/ManPages/ChangeLog.txt b/LUFA/ManPages/ChangeLog.txt
index 55e12414c..b3bda78c9 100644
--- a/LUFA/ManPages/ChangeLog.txt
+++ b/LUFA/ManPages/ChangeLog.txt
@@ -15,7 +15,8 @@
   *
   *  <b>Changed:</b>
   *  - Core:
-  *   - None
+  *   - When automatic PLL management mode is enabled on the U4 series AVR8 chips, the PLL is now configured for 48MHz and not
+  *     a divided 96MHz, to lower power consumption and to keep the system within the datasheet specs for 3.3V operation (thanks to Scott Vitale)
   *  - Library Applications:
   *   - None
   *