From: Peter Henn Date: Fri, 30 May 2014 20:45:33 +0000 (+0000) Subject: Add support for 18 MHz Clock X-Git-Url: http://git.linex4red.de/pub/USBasp.git/commitdiff_plain/31384cf9f2f23becbb38d471e1a320f7bcf15d50?ds=inline Add support for 18 MHz Clock - integrate usbdrv from 2012-07-09, which support also 18 MHz clock - add ATmega328p with 18 MHz --- diff --git a/Makefile b/Makefile index 64bb08741..1dbe4b815 100644 --- a/Makefile +++ b/Makefile @@ -20,6 +20,7 @@ all: $(MAKE) F_CPU=12000000 DEVICE=atmega88 do_firmware $(MAKE) F_CPU=12000000 DEVICE=atmega328p do_firmware $(MAKE) F_CPU=16000000 DEVICE=atmega328p do_firmware + $(MAKE) F_CPU=18000000 DEVICE=atmega328p do_firmware help: @echo "Usage:" diff --git a/bin/firmware/Makefile328 b/bin/firmware/Makefile328 index ff05ef86e..3a71530f6 100644 --- a/bin/firmware/Makefile328 +++ b/bin/firmware/Makefile328 @@ -7,11 +7,18 @@ ifeq ($(F_CPU), 12000000) $(FLASHER) -B 1 -U flash:w:usbasp.atmega328p-12MHz.hex else ifeq ($(F_CPU), 16000000) $(FLASHER) -B 1 -U flash:w:usbasp.atmega328p-16MHz.hex +else ifeq ($(F_CPU), 18000000) + $(FLASHER) -B 1 -U flash:w:usbasp.atmega328p-18MHz.hex else $(error setting of F_CPU is not supported.) endif fuses: +ifeq ($(F_CPU), 18000000) + $(FLASHER) -B 300 -U lfuse:w:0xe7:m -U hfuse:w:0xd9:m -U efuse:w:0x05:m +else $(FLASHER) -B 300 -U lfuse:w:0xef:m -U hfuse:w:0xd9:m -U efuse:w:0x05:m +endif + shell: $(FLASHER) -B 200 -t diff --git a/bin/firmware/usbasp.atmega328p-18MHz.hex b/bin/firmware/usbasp.atmega328p-18MHz.hex new file mode 100644 index 000000000..6a1889e82 --- /dev/null +++ b/bin/firmware/usbasp.atmega328p-18MHz.hex @@ -0,0 +1,305 @@ +:100000000C945D000C94CA010C947A000C947A0054 +:100010000C947A000C947A000C947A000C947A0078 +:100020000C947A000C947A000C947A000C947A0068 +:100030000C947A000C947A000C947A000C947A0058 +:100040000C947A000C947A000C947A000C947A0048 +:100050000C947A000C947A000C947A000C947A0038 +:100060000C947A000C947A000902120001010080BD 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+:101250000E0180910F019091100148810E944F056D +:10126000809114018093170196CF462F682F8091AB +:101270000D0190910E010E945D0680910D019091EB +:101280000E01A0910F01B0911001810F911DA11DC0 +:10129000B11D80930D0190930E01A0930F01B093A7 +:1012A00010018091110190911201811B910990937D +:1012B000120180931101892B29F410921301FF244C +:1012C000F39445CFF12C43CF1BB815B88BEF8AB9F7 +:1012D0008FEF84B914B883E087B99EEF98B985BDC4 +:1012E0000E94AA0178940E947C00FDCFF894FFCF61 +:0212F0005AFFA3 +:00000001FF diff --git a/firmware/Makefile b/firmware/Makefile index fd422b165..cdf9d0b87 100755 --- a/firmware/Makefile +++ b/firmware/Makefile @@ -6,16 +6,17 @@ # 20140329 Peter Henn F_CPU parameter added # -# TARGET=atmega8 HFUSE=0xc9 LFUSE=0xef +# TARGET=atmega8 HFUSE=0xc9 LFUSE=0xef F_CPU=12000000 +# TARGET=atmega8 HFUSE=0xc9 LFUSE=0xef F_CPU=16000000 # TARGET=atmega48 HFUSE=0xdd LFUSE=0xff # TARGET=atmega328 HFUSE=0xd9 LFUSE=0xef EFUSE=0x05 F_CPU=12000000 # TARGET=atmega328 HFUSE=0xd9 LFUSE=0xef EFUSE=0x05 F_CPU=16000000 +# TARGET=atmega328 HFUSE=0xd9 LFUSE=0xe7 EFUSE=0x05 F_CPU=18000000 # TARGET=at90s2313 -TARGET=atmega328p -HFUSE=0xd9 +TARGET=atmega8 +HFUSE=0xc9 LFUSE=0xef -EFUSE=0x05 -F_CPU=16000000 +F_CPU=12000000 # ISP=bsd PORT=/dev/parport0 # ISP=ponyser PORT=/dev/ttyS1 diff --git a/firmware/usbdrv/Changelog.txt b/firmware/usbdrv/Changelog.txt index 5c6354ab1..79b521559 100644 --- a/firmware/usbdrv/Changelog.txt +++ b/firmware/usbdrv/Changelog.txt @@ -306,3 +306,24 @@ Scroll down to the bottom to see the most recent changes. endpoint now. * Release 2010-07-15 + + - Fixed bug in usbDriverSetup() which prevented descriptor sizes above 255 + bytes. + - Avoid a compiler warning for unused parameter in usbHandleResetHook() when + compiler option -Wextra is enabled. + - Fixed wrong hex value for some IDs in USB-IDs-for-free.txt. + - Keep a define for USBATTR_BUSPOWER, although the flag does not exist + in USB 1.1 any more. Set it to 0. This is for backward compatibility. + +* Release 2012-01-09 + + - Define a separate (defined) type for usbMsgPtr so that projects using a + tiny memory model can define it to an 8 bit type in usbconfig.h. This + change also saves a couple of bytes when using a scalar 16 bit type. + - Inserted "const" keyword for all PROGMEM declarations because new GCC + requires it. + - Fixed problem with dependence of usbportability.h on usbconfig.h. This + problem occurred with IAR CC only. + - Prepared repository for github.com. + +* Release 2012-12-06 \ No newline at end of file diff --git a/firmware/usbdrv/CommercialLicense.txt b/firmware/usbdrv/CommercialLicense.txt index 65bdb4e5f..8bd853d39 100644 --- a/firmware/usbdrv/CommercialLicense.txt +++ b/firmware/usbdrv/CommercialLicense.txt @@ -1,5 +1,5 @@ V-USB Driver Software License Agreement -Version 2009-08-03 +Version 2012-07-09 THIS LICENSE AGREEMENT GRANTS YOU CERTAIN RIGHTS IN A SOFTWARE. YOU CAN ENTER INTO THIS AGREEMENT AND ACQUIRE THE RIGHTS OUTLINED BELOW BY PAYING @@ -37,10 +37,10 @@ Product ID(s), sent to you in e-mail. These Product IDs are reserved exclusively for you. OBJECTIVE DEVELOPMENT has obtained USB Product ID ranges under the Vendor ID 5824 from Wouter van Ooijen (Van Ooijen Technische Informatica, www.voti.nl) and under the Vendor ID 8352 from -Jason Kotzin (Clay Logic, www.claylogic.com). Both owners of the Vendor IDs -have obtained these IDs from the USB Implementers Forum, Inc. -(www.usb.org). OBJECTIVE DEVELOPMENT disclaims all liability which might -arise from the assignment of USB IDs. +Jason Kotzin (now flirc.tv, Inc.). Both owners of the Vendor IDs have +obtained these IDs from the USB Implementers Forum, Inc. (www.usb.org). +OBJECTIVE DEVELOPMENT disclaims all liability which might arise from the +assignment of USB IDs. 2.5 USB Certification. Although not part of this agreement, we want to make it clear that you cannot become USB certified when you use V-USB or a USB diff --git a/firmware/usbdrv/USB-ID-FAQ.txt b/firmware/usbdrv/USB-ID-FAQ.txt index d1de8fb61..a4a6bd6ec 100644 --- a/firmware/usbdrv/USB-ID-FAQ.txt +++ b/firmware/usbdrv/USB-ID-FAQ.txt @@ -1,4 +1,4 @@ -Version 2009-08-22 +Version 2012-07-09 ========================== WHY DO WE NEED THESE IDs? @@ -107,8 +107,8 @@ WHO IS THE OWNER OF THE VENDOR-ID? Objective Development has obtained ranges of USB Product-IDs under two Vendor-IDs: Under Vendor-ID 5824 from Wouter van Ooijen (Van Ooijen Technische Informatica, www.voti.nl) and under Vendor-ID 8352 from Jason -Kotzin (Clay Logic, www.claylogic.com). Both VID owners have received their -Vendor-ID directly from usb.org. +Kotzin (now flirc.tv, Inc.). Both VID owners have received their Vendor-ID +directly from usb.org. ========================================================================= diff --git a/firmware/usbdrv/USB-IDs-for-free.txt b/firmware/usbdrv/USB-IDs-for-free.txt index 2f4d59ad1..d46517d8e 100644 --- a/firmware/usbdrv/USB-IDs-for-free.txt +++ b/firmware/usbdrv/USB-IDs-for-free.txt @@ -86,8 +86,9 @@ If you use one of the IDs listed below, your device and host-side software must conform to these rules: (1) The USB device MUST provide a textual representation of the serial -number. The serial number string MUST be available at least in USB language -0x0409 (English/US). +number, unless ONLY the operating system's default class driver is used. +The serial number string MUST be available at least in USB language 0x0409 +(English/US). (2) The serial number MUST start with either an Internet domain name (e.g. "mycompany.com") registered and owned by you, or an e-mail address under your @@ -108,6 +109,11 @@ driver for Vendor Class devices is needed, this driver must be libusb or libusb-win32 (see http://libusb.org/ and http://libusb-win32.sourceforge.net/). +(7) If ONLY the operating system's default class driver is used, e.g. for +mice, keyboards, joysticks, CDC or MIDI devices and no discrimination by an +application is needed, the serial number may be omitted. + + Table if IDs for discrimination by serial number string: PID dec (hex) | VID dec (hex) | Description of use @@ -121,11 +127,11 @@ PID dec (hex) | VID dec (hex) | Description of use ---------------+---------------+------------------------------------------- 10203 (0x27db) | 5824 (0x16c0) | For USB Keyboards ---------------+---------------+------------------------------------------- -10204 (0x27db) | 5824 (0x16c0) | For USB Joysticks +10204 (0x27dc) | 5824 (0x16c0) | For USB Joysticks ---------------+---------------+------------------------------------------- -10205 (0x27dc) | 5824 (0x16c0) | For CDC-ACM class devices (modems) +10205 (0x27dd) | 5824 (0x16c0) | For CDC-ACM class devices (modems) ---------------+---------------+------------------------------------------- -10206 (0x27dd) | 5824 (0x16c0) | For MIDI class devices +10206 (0x27de) | 5824 (0x16c0) | For MIDI class devices ---------------+---------------+------------------------------------------- diff --git a/firmware/usbdrv/asmcommon.inc b/firmware/usbdrv/asmcommon.inc index 07d692be3..d2a4f7cbd 100644 --- a/firmware/usbdrv/asmcommon.inc +++ b/firmware/usbdrv/asmcommon.inc @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * Revision: $Id$ */ /* Do not link this file! Link usbdrvasm.S instead, which includes the diff --git a/firmware/usbdrv/oddebug.c b/firmware/usbdrv/oddebug.c index 945457c1f..19bf142b7 100644 --- a/firmware/usbdrv/oddebug.c +++ b/firmware/usbdrv/oddebug.c @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * This Revision: $Id: oddebug.c 692 2008-11-07 15:07:40Z cs $ */ #include "oddebug.h" diff --git a/firmware/usbdrv/oddebug.h b/firmware/usbdrv/oddebug.h index d61309daa..851f84dea 100644 --- a/firmware/usbdrv/oddebug.h +++ b/firmware/usbdrv/oddebug.h @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * This Revision: $Id: oddebug.h 692 2008-11-07 15:07:40Z cs $ */ #ifndef __oddebug_h_included__ diff --git a/firmware/usbdrv/usbconfig-prototype.h b/firmware/usbdrv/usbconfig-prototype.h index 847710e2a..22dd9e87c 100644 --- a/firmware/usbdrv/usbconfig-prototype.h +++ b/firmware/usbdrv/usbconfig-prototype.h @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * This Revision: $Id: usbconfig-prototype.h 785 2010-05-30 17:57:07Z cs $ */ #ifndef __usbconfig_h_included__ @@ -356,6 +355,15 @@ section at the end of this file). #define USB_CFG_DESCR_PROPS_HID_REPORT 0 #define USB_CFG_DESCR_PROPS_UNKNOWN 0 + +//#define usbMsgPtr_t unsigned short +/* If usbMsgPtr_t is not defined, it defaults to 'uchar *'. We may define it to + * a scalar type here because gcc generates slightly shorter code for scalar + * arithmetics than for pointer arithmetics. Remove this define for backward + * type compatibility or define it to an 8 bit type if you use data in RAM only + * and all RAM is below 256 bytes (tiny memory model in IAR CC). + */ + /* ----------------------- Optional MCU Description ------------------------ */ /* The following configurations have working defaults in usbdrv.h. You diff --git a/firmware/usbdrv/usbdrv.c b/firmware/usbdrv/usbdrv.c index e37727c58..6c61e3bb8 100644 --- a/firmware/usbdrv/usbdrv.c +++ b/firmware/usbdrv/usbdrv.c @@ -5,10 +5,8 @@ * Tabsize: 4 * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * This Revision: $Id: usbdrv.c 791 2010-07-15 15:56:13Z cs $ */ -#include "usbportability.h" #include "usbdrv.h" #include "oddebug.h" @@ -45,7 +43,7 @@ uchar usbCurrentDataToken;/* when we check data toggling to ignore duplica #endif /* USB status registers / not shared with asm code */ -uchar *usbMsgPtr; /* data to transmit next -- ROM or RAM address */ +usbMsgPtr_t usbMsgPtr; /* data to transmit next -- ROM or RAM address */ static usbMsgLen_t usbMsgLen = USB_NO_MSG; /* remaining number of bytes */ static uchar usbMsgFlags; /* flag values see below */ @@ -221,7 +219,7 @@ static inline void usbResetStall(void) static void usbGenericSetInterrupt(uchar *data, uchar len, usbTxStatus_t *txStatus) { uchar *p; -char i; +schar i; #if USB_CFG_IMPLEMENT_HALT if(usbTxLen1 == USBPID_STALL) @@ -301,7 +299,7 @@ USB_PUBLIC void usbSetInterrupt3(uchar *data, uchar len) len = usbFunctionDescriptor(rq); \ }else{ \ len = USB_PROP_LENGTH(cfgProp); \ - usbMsgPtr = (uchar *)(staticName); \ + usbMsgPtr = (usbMsgPtr_t)(staticName); \ } \ } @@ -361,7 +359,8 @@ uchar flags = USB_FLG_MSGPTR_IS_ROM; */ static inline usbMsgLen_t usbDriverSetup(usbRequest_t *rq) { -uchar len = 0, *dataPtr = usbTxBuf + 9; /* there are 2 bytes free space at the end of the buffer */ +usbMsgLen_t len = 0; +uchar *dataPtr = usbTxBuf + 9; /* there are 2 bytes free space at the end of the buffer */ uchar value = rq->wValue.bytes[0]; #if USB_CFG_IMPLEMENT_HALT uchar index = rq->wIndex.bytes[0]; @@ -408,7 +407,7 @@ uchar index = rq->wIndex.bytes[0]; SWITCH_DEFAULT /* 7=SET_DESCRIPTOR, 12=SYNC_FRAME */ /* Should we add an optional hook here? */ SWITCH_END - usbMsgPtr = dataPtr; + usbMsgPtr = (usbMsgPtr_t)dataPtr; skipMsgPtrAssignment: return len; } @@ -498,7 +497,8 @@ static uchar usbDeviceRead(uchar *data, uchar len) }else #endif { - uchar i = len, *r = usbMsgPtr; + uchar i = len; + usbMsgPtr_t r = usbMsgPtr; if(usbMsgFlags & USB_FLG_MSGPTR_IS_ROM){ /* ROM data */ do{ uchar c = USB_READ_FLASH(r); /* assign to char size variable to enforce byte ops */ @@ -507,7 +507,8 @@ static uchar usbDeviceRead(uchar *data, uchar len) }while(--i); }else{ /* RAM data */ do{ - *data++ = *r++; + *data++ = *((uchar *)r); + r++; }while(--i); } usbMsgPtr = r; @@ -557,6 +558,8 @@ uchar isReset = !notResetState; USB_RESET_HOOK(isReset); wasReset = isReset; } +#else + notResetState = notResetState; // avoid compiler warning #endif } diff --git a/firmware/usbdrv/usbdrv.h b/firmware/usbdrv/usbdrv.h index e8cc4b3ac..113854e71 100644 --- a/firmware/usbdrv/usbdrv.h +++ b/firmware/usbdrv/usbdrv.h @@ -5,13 +5,10 @@ * Tabsize: 4 * Copyright: (c) 2005 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * This Revision: $Id: usbdrv.h 793 2010-07-15 15:58:11Z cs $ */ #ifndef __usbdrv_h_included__ #define __usbdrv_h_included__ -#include "usbconfig.h" -#include "usbportability.h" /* Hardware Prerequisites: @@ -118,11 +115,28 @@ USB messages, even if they address another (low-speed) device on the same bus. */ + +#ifdef __cplusplus +// This header should be included as C-header from C++ code. However if usbdrv.c +// is incorporated into a C++ module with an include, function names are mangled +// and this header must be parsed as C++ header, too. External modules should be +// treated as C, though, because they are compiled separately as C code. +extern "C" { +#endif + +#include "usbconfig.h" +#include "usbportability.h" + +#ifdef __cplusplus +} +#endif + + /* ------------------------------------------------------------------------- */ /* --------------------------- Module Interface ---------------------------- */ /* ------------------------------------------------------------------------- */ -#define USBDRV_VERSION 20100715 +#define USBDRV_VERSION 20121206 /* This define uniquely identifies a driver version. It is a decimal number * constructed from the driver's release date in the form YYYYMMDD. If the * driver's behavior or interface changes, you can use this constant to @@ -163,6 +177,17 @@ USB messages, even if they address another (low-speed) device on the same bus. */ #define USB_NO_MSG ((usbMsgLen_t)-1) /* constant meaning "no message" */ +#ifndef usbMsgPtr_t +#define usbMsgPtr_t uchar * +#endif +/* Making usbMsgPtr_t a define allows the user of this library to define it to + * an 8 bit type on tiny devices. This reduces code size, especially if the + * compiler supports a tiny memory model. + * The type can be a pointer or scalar type, casts are made where necessary. + * Although it's paradoxical, Gcc 4 generates slightly better code for scalar + * types than for pointers. + */ + struct usbRequest; /* forward declaration */ USB_PUBLIC void usbInit(void); @@ -178,7 +203,7 @@ USB_PUBLIC void usbPoll(void); * Please note that debug outputs through the UART take ~ 0.5ms per byte * at 19200 bps. */ -extern uchar *usbMsgPtr; +extern usbMsgPtr_t usbMsgPtr; /* This variable may be used to pass transmit data to the driver from the * implementation of usbFunctionWrite(). It is also used internally by the * driver for standard control requests. @@ -390,13 +415,13 @@ extern volatile schar usbRxLen; * about the various methods to define USB descriptors. If you do nothing, * the default descriptors will be used. */ -#define USB_PROP_IS_DYNAMIC (1 << 14) +#define USB_PROP_IS_DYNAMIC (1u << 14) /* If this property is set for a descriptor, usbFunctionDescriptor() will be * used to obtain the particular descriptor. Data directly returned via * usbMsgPtr are FLASH data by default, combine (OR) with USB_PROP_IS_RAM to * return RAM data. */ -#define USB_PROP_IS_RAM (1 << 15) +#define USB_PROP_IS_RAM (1u << 15) /* If this property is set for a descriptor, the data is read from RAM * memory instead of Flash. The property is used for all methods to provide * external descriptors. @@ -719,6 +744,7 @@ typedef struct usbRequest{ #define USBDESCR_HID_PHYS 0x23 //#define USBATTR_BUSPOWER 0x80 // USB 1.1 does not define this value any more +#define USBATTR_BUSPOWER 0 #define USBATTR_SELFPOWER 0x40 #define USBATTR_REMOTEWAKE 0x20 diff --git a/firmware/usbdrv/usbdrvasm.S b/firmware/usbdrv/usbdrvasm.S index 2e8097da9..80f497010 100644 --- a/firmware/usbdrv/usbdrvasm.S +++ b/firmware/usbdrv/usbdrvasm.S @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * Revision: $Id: usbdrvasm.S 785 2010-05-30 17:57:07Z cs $ */ /* @@ -146,7 +145,8 @@ RTMODEL "__rt_version", "3" #if USB_USE_FAST_CRC ; This implementation is faster, but has bigger code size -; Thanks to Slawomir Fras (BoskiDialer) for this code! +; Thanks to Slawomir Fras (BoskiDialer) for this code and to Shay Green for +; even further optimizations! ; It implements the following C pseudo-code: ; unsigned table(unsigned char x) ; { @@ -176,35 +176,29 @@ RTMODEL "__rt_version", "3" ; resCrc r24+r25 / r16+r17 ; ptr X / Z usbCrc16: - mov ptrL, argPtrL - mov ptrH, argPtrH + movw ptrL, argPtrL ldi resCrcL, 0xFF ldi resCrcH, 0xFF + clr bitCnt ; zero reg rjmp usbCrc16LoopTest usbCrc16ByteLoop: ld byte, ptr+ - eor resCrcL, byte ; resCrcL is now 'x' in table() - mov byte, resCrcL ; compute parity of 'x' + eor byte, resCrcL ; scratch is now 'x' in table() + mov scratch, byte ; compute parity of 'x' swap byte - eor byte, resCrcL - mov scratch, byte + eor byte, scratch + mov resCrcL, byte lsr byte lsr byte - eor byte, scratch + eor byte, resCrcL inc byte - lsr byte - andi byte, 1 ; byte is now parity(x) - mov scratch, resCrcL - mov resCrcL, resCrcH - eor resCrcL, byte ; low byte of if(parity(x)) value ^= 0xc001; - neg byte - andi byte, 0xc0 - mov resCrcH, byte ; high byte of if(parity(x)) value ^= 0xc001; - clr byte - lsr scratch - ror byte - eor resCrcH, scratch - eor resCrcL, byte + andi byte, 2 ; byte is now parity(x) << 1 + cp bitCnt, byte ; c = (byte != 0), then put in high bit + ror scratch ; so that after xoring, shifting, and xoring, it gives + ror byte ; the desired 0xC0 with resCrcH + mov resCrcL, byte + eor resCrcL, resCrcH + mov resCrcH, scratch lsr scratch ror byte eor resCrcH, scratch @@ -372,7 +366,7 @@ usbMFTimeout: # if USB_CFG_CLOCK_KHZ == 18000 # include "usbdrvasm18-crc.inc" # else -# error "USB_CFG_CLOCK_KHZ is not one of the supported crc-rates!" +# error "USB_CFG_CLOCK_KHZ is not one of the supported rates for USB_CFG_CHECK_CRC!" # endif #else /* USB_CFG_CHECK_CRC */ # if USB_CFG_CLOCK_KHZ == 12000 @@ -385,9 +379,11 @@ usbMFTimeout: # include "usbdrvasm16.inc" # elif USB_CFG_CLOCK_KHZ == 16500 # include "usbdrvasm165.inc" +# elif USB_CFG_CLOCK_KHZ == 18000 +# include "usbdrvasm18.inc" # elif USB_CFG_CLOCK_KHZ == 20000 # include "usbdrvasm20.inc" # else -# error "USB_CFG_CLOCK_KHZ is not one of the supported non-crc-rates!" +# error "USB_CFG_CLOCK_KHZ is not one of the supported rates!" # endif #endif /* USB_CFG_CHECK_CRC */ diff --git a/firmware/usbdrv/usbdrvasm.asm b/firmware/usbdrv/usbdrvasm.asm index 9cc4e4d73..fb669343f 100644 --- a/firmware/usbdrv/usbdrvasm.asm +++ b/firmware/usbdrv/usbdrvasm.asm @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2006 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * This Revision: $Id$ */ /* diff --git a/firmware/usbdrv/usbdrvasm12.inc b/firmware/usbdrv/usbdrvasm12.inc index d720f7efd..a8e475c49 100644 --- a/firmware/usbdrv/usbdrvasm12.inc +++ b/firmware/usbdrv/usbdrvasm12.inc @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * This Revision: $Id: usbdrvasm12.inc 740 2009-04-13 18:23:31Z cs $ */ /* Do not link this file! Link usbdrvasm.S instead, which includes the diff --git a/firmware/usbdrv/usbdrvasm128.inc b/firmware/usbdrv/usbdrvasm128.inc index bcd6621cc..8f67bcc4b 100644 --- a/firmware/usbdrv/usbdrvasm128.inc +++ b/firmware/usbdrv/usbdrvasm128.inc @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2008 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * This Revision: $Id: usbdrvasm128.inc 758 2009-08-06 10:12:54Z cs $ */ /* Do not link this file! Link usbdrvasm.S instead, which includes the diff --git a/firmware/usbdrv/usbdrvasm15.inc b/firmware/usbdrv/usbdrvasm15.inc index c13bd91b5..05d16f3d2 100644 --- a/firmware/usbdrv/usbdrvasm15.inc +++ b/firmware/usbdrv/usbdrvasm15.inc @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * Revision: $Id: usbdrvasm15.inc 740 2009-04-13 18:23:31Z cs $ */ /* Do not link this file! Link usbdrvasm.S instead, which includes the diff --git a/firmware/usbdrv/usbdrvasm16.inc b/firmware/usbdrv/usbdrvasm16.inc index a30e194e9..3559f4ab0 100644 --- a/firmware/usbdrv/usbdrvasm16.inc +++ b/firmware/usbdrv/usbdrvasm16.inc @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * Revision: $Id: usbdrvasm16.inc 760 2009-08-09 18:59:43Z cs $ */ /* Do not link this file! Link usbdrvasm.S instead, which includes the diff --git a/firmware/usbdrv/usbdrvasm165.inc b/firmware/usbdrv/usbdrvasm165.inc index d29139a5a..30b09acc0 100644 --- a/firmware/usbdrv/usbdrvasm165.inc +++ b/firmware/usbdrv/usbdrvasm165.inc @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2007 by OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * Revision: $Id: usbdrvasm165.inc 740 2009-04-13 18:23:31Z cs $ */ /* Do not link this file! Link usbdrvasm.S instead, which includes the diff --git a/firmware/usbdrv/usbdrvasm18-crc.inc b/firmware/usbdrv/usbdrvasm18-crc.inc index ad0269e71..bf7250118 100644 --- a/firmware/usbdrv/usbdrvasm18-crc.inc +++ b/firmware/usbdrv/usbdrvasm18-crc.inc @@ -5,7 +5,6 @@ * Tabsize: 4 * Copyright: (c) 2008 by Lukas Schrittwieser and OBJECTIVE DEVELOPMENT Software GmbH * License: GNU GPL v2 (see License.txt), GNU GPL v3 or proprietary (CommercialLicense.txt) - * Revision: $Id: usbdrvasm18-crc.inc 740 2009-04-13 18:23:31Z cs $ */ /* Do not link this file! Link usbdrvasm.S instead, which includes the @@ -79,44 +78,44 @@ of CPU cycles, but even an exact number of cycles! macro POP_STANDARD ; 18 cycles - pop ZH - pop ZL - pop cnt - pop x5 - pop x3 - pop x2 - pop x1 - pop shift - pop x4 - endm -macro POP_RETI ; 7 cycles - pop YH - pop YL - out SREG, YL - pop YL - endm + pop ZH + pop ZL + pop cnt + pop x5 + pop x3 + pop x2 + pop x1 + pop shift + pop x4 + endm +macro POP_RETI ; 7 cycles + pop YH + pop YL + out SREG, YL + pop YL + endm macro CRC_CLEANUP_AND_CHECK ; the last byte has already been xored with the lower crc byte, we have to do the table lookup and xor ; x3 is the higher crc byte, zl the lower one - ldi ZH, hi8(usbCrcTableHigh);[+1] get the new high byte from the table - lpm x2, Z ;[+2][+3][+4] - ldi ZH, hi8(usbCrcTableLow);[+5] get the new low xor byte from the table - lpm ZL, Z ;[+6][+7][+8] - eor ZL, x3 ;[+7] xor the old high byte with the value from the table, x2:ZL now holds the crc value - cpi ZL, 0x01 ;[+8] if the crc is ok we have a fixed remainder value of 0xb001 in x2:ZL (see usb spec) + ldi ZH, hi8(usbCrcTableHigh);[+1] get the new high byte from the table + lpm x2, Z ;[+2][+3][+4] + ldi ZH, hi8(usbCrcTableLow) ;[+5] get the new low xor byte from the table + lpm ZL, Z ;[+6][+7][+8] + eor ZL, x3 ;[+7] xor the old high byte with the value from the table, x2:ZL now holds the crc value + cpi ZL, 0x01 ;[+8] if the crc is ok we have a fixed remainder value of 0xb001 in x2:ZL (see usb spec) brne ignorePacket ;[+9] detected a crc fault -> paket is ignored and retransmitted by the host - cpi x2, 0xb0 ;[+10] + cpi x2, 0xb0 ;[+10] brne ignorePacket ;[+11] detected a crc fault -> paket is ignored and retransmitted by the host - endm + endm USB_INTR_VECTOR: ;order of registers pushed: YL, SREG, YH, [sofError], x4, shift, x1, x2, x3, x5, cnt, ZL, ZH - push YL ;[-28] push only what is necessary to sync with edge ASAP - in YL, SREG ;[-26] - push YL ;[-25] - push YH ;[-23] + push YL ;[-28] push only what is necessary to sync with edge ASAP + in YL, SREG ;[-26] + push YL ;[-25] + push YH ;[-23] ;---------------------------------------------------------------------------- ; Synchronize with sync pattern: ;---------------------------------------------------------------------------- @@ -126,59 +125,59 @@ USB_INTR_VECTOR: ;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to ;waitForJ, ensure that this prerequisite is met. waitForJ: - inc YL - sbis USBIN, USBMINUS - brne waitForJ ; just make sure we have ANY timeout + inc YL + sbis USBIN, USBMINUS + brne waitForJ ; just make sure we have ANY timeout waitForK: ;The following code results in a sampling window of < 1/4 bit which meets the spec. - sbis USBIN, USBMINUS ;[-17] - rjmp foundK ;[-16] - sbis USBIN, USBMINUS - rjmp foundK - sbis USBIN, USBMINUS - rjmp foundK - sbis USBIN, USBMINUS - rjmp foundK - sbis USBIN, USBMINUS - rjmp foundK - sbis USBIN, USBMINUS - rjmp foundK - sbis USBIN, USBMINUS - rjmp foundK - sbis USBIN, USBMINUS - rjmp foundK - sbis USBIN, USBMINUS - rjmp foundK + sbis USBIN, USBMINUS ;[-17] + rjmp foundK ;[-16] + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK #if USB_COUNT_SOF - lds YL, usbSofCount - inc YL - sts usbSofCount, YL + lds YL, usbSofCount + inc YL + sts usbSofCount, YL #endif /* USB_COUNT_SOF */ #ifdef USB_SOF_HOOK - USB_SOF_HOOK + USB_SOF_HOOK #endif - rjmp sofError + rjmp sofError foundK: ;[-15] ;{3, 5} after falling D- edge, average delay: 4 cycles ;bit0 should be at 30 (2.5 bits) for center sampling. Currently at 4 so 26 cylces till bit 0 sample ;use 1 bit time for setup purposes, then sample again. Numbers in brackets ;are cycles from center of first sync (double K) bit after the instruction - push x4 ;[-14] -; [---] ;[-13] - lds YL, usbInputBufOffset;[-12] used to toggle the two usb receive buffers -; [---] ;[-11] - clr YH ;[-10] - subi YL, lo8(-(usbRxBuf));[-9] [rx loop init] - sbci YH, hi8(-(usbRxBuf));[-8] [rx loop init] - push shift ;[-7] -; [---] ;[-6] - ldi shift, 0x80 ;[-5] the last bit is the end of byte marker for the pid receiver loop - clc ;[-4] the carry has to be clear for receipt of pid bit 0 - sbis USBIN, USBMINUS ;[-3] we want two bits K (sample 3 cycles too early) - rjmp haveTwoBitsK ;[-2] - pop shift ;[-1] undo the push from before - pop x4 ;[1] - rjmp waitForK ;[3] this was not the end of sync, retry + push x4 ;[-14] +; [---] ;[-13] + lds YL, usbInputBufOffset ;[-12] used to toggle the two usb receive buffers +; [---] ;[-11] + clr YH ;[-10] + subi YL, lo8(-(usbRxBuf)) ;[-9] [rx loop init] + sbci YH, hi8(-(usbRxBuf)) ;[-8] [rx loop init] + push shift ;[-7] +; [---] ;[-6] + ldi shift, 0x80 ;[-5] the last bit is the end of byte marker for the pid receiver loop + clc ;[-4] the carry has to be clear for receipt of pid bit 0 + sbis USBIN, USBMINUS ;[-3] we want two bits K (sample 3 cycles too early) + rjmp haveTwoBitsK ;[-2] + pop shift ;[-1] undo the push from before + pop x4 ;[1] + rjmp waitForK ;[3] this was not the end of sync, retry ; The entire loop from waitForK until rjmp waitForK above must not exceed two ; bit times (= 24 cycles). @@ -186,13 +185,13 @@ foundK: ;[-15] ; push more registers and initialize values while we sample the first bits: ;---------------------------------------------------------------------------- haveTwoBitsK: - push x1 ;[0] - push x2 ;[2] - push x3 ;[4] crc high byte - ldi x2, 1< jump back and store the byte - ori shift, 0x01 ;[11] invert the last received bit to prevent furhter unstuffing - in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors - andi x5, 0xFE ;[1] mark this bit as inverted (will be corrected before storing shift) - eor x1, x2 ;[2] x1 and x2 have to be different because the stuff bit is always a zero - andi x1, USBMASK ;[3] mask the interesting bits - breq stuffErr ;[4] if the stuff bit is a 1-bit something went wrong - mov x1, x2 ;[5] the next bit expects the last state to be in x1 - rjmp didunstuff0 ;[6] - ;[7] jump delay of rjmp didunstuffX - -unstuff1: ;[11] this is the jump delay of breq unstuffX - in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors - ori shift, 0x02 ;[1] invert the last received bit to prevent furhter unstuffing - andi x5, 0xFD ;[2] mark this bit as inverted (will be corrected before storing shift) - eor x2, x1 ;[3] x1 and x2 have to be different because the stuff bit is always a zero - andi x2, USBMASK ;[4] mask the interesting bits - breq stuffErr ;[5] if the stuff bit is a 1-bit something went wrong - mov x2, x1 ;[6] the next bit expects the last state to be in x2 - nop2 ;[7] - ;[8] - rjmp didunstuff1 ;[9] - ;[10] jump delay of rjmp didunstuffX - -unstuff2: ;[9] this is the jump delay of breq unstuffX - ori shift, 0x04 ;[10] invert the last received bit to prevent furhter unstuffing - andi x5, 0xFB ;[11] mark this bit as inverted (will be corrected before storing shift) - in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors - eor x1, x2 ;[1] x1 and x2 have to be different because the stuff bit is always a zero - andi x1, USBMASK ;[2] mask the interesting bits - breq stuffErr ;[3] if the stuff bit is a 1-bit something went wrong - mov x1, x2 ;[4] the next bit expects the last state to be in x1 - nop2 ;[5] - ;[6] - rjmp didunstuff2 ;[7] - ;[8] jump delay of rjmp didunstuffX - -unstuff3: ;[9] this is the jump delay of breq unstuffX - ori shift, 0x08 ;[10] invert the last received bit to prevent furhter unstuffing - andi x5, 0xF7 ;[11] mark this bit as inverted (will be corrected before storing shift) - in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors - eor x2, x1 ;[1] x1 and x2 have to be different because the stuff bit is always a zero - andi x2, USBMASK ;[2] mask the interesting bits - breq stuffErr ;[3] if the stuff bit is a 1-bit something went wrong - mov x2, x1 ;[4] the next bit expects the last state to be in x2 - nop2 ;[5] - ;[6] - rjmp didunstuff3 ;[7] - ;[8] jump delay of rjmp didunstuffX +unstuff0: ;[8] this is the branch delay of breq unstuffX + andi x1, USBMASK ;[9] do an se0 check here (if the last crc byte ends with 5 one's we might end up here + breq didunstuff0 ;[10] event tough the message is complete -> jump back and store the byte + ori shift, 0x01 ;[11] invert the last received bit to prevent furhter unstuffing + in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors + andi x5, 0xFE ;[1] mark this bit as inverted (will be corrected before storing shift) + eor x1, x2 ;[2] x1 and x2 have to be different because the stuff bit is always a zero + andi x1, USBMASK ;[3] mask the interesting bits + breq stuffErr ;[4] if the stuff bit is a 1-bit something went wrong + mov x1, x2 ;[5] the next bit expects the last state to be in x1 + rjmp didunstuff0 ;[6] + ;[7] jump delay of rjmp didunstuffX + +unstuff1: ;[11] this is the jump delay of breq unstuffX + in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors + ori shift, 0x02 ;[1] invert the last received bit to prevent furhter unstuffing + andi x5, 0xFD ;[2] mark this bit as inverted (will be corrected before storing shift) + eor x2, x1 ;[3] x1 and x2 have to be different because the stuff bit is always a zero + andi x2, USBMASK ;[4] mask the interesting bits + breq stuffErr ;[5] if the stuff bit is a 1-bit something went wrong + mov x2, x1 ;[6] the next bit expects the last state to be in x2 + nop2 ;[7] + ;[8] + rjmp didunstuff1 ;[9] + ;[10] jump delay of rjmp didunstuffX + +unstuff2: ;[9] this is the jump delay of breq unstuffX + ori shift, 0x04 ;[10] invert the last received bit to prevent furhter unstuffing + andi x5, 0xFB ;[11] mark this bit as inverted (will be corrected before storing shift) + in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors + eor x1, x2 ;[1] x1 and x2 have to be different because the stuff bit is always a zero + andi x1, USBMASK ;[2] mask the interesting bits + breq stuffErr ;[3] if the stuff bit is a 1-bit something went wrong + mov x1, x2 ;[4] the next bit expects the last state to be in x1 + nop2 ;[5] + ;[6] + rjmp didunstuff2 ;[7] + ;[8] jump delay of rjmp didunstuffX + +unstuff3: ;[9] this is the jump delay of breq unstuffX + ori shift, 0x08 ;[10] invert the last received bit to prevent furhter unstuffing + andi x5, 0xF7 ;[11] mark this bit as inverted (will be corrected before storing shift) + in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors + eor x2, x1 ;[1] x1 and x2 have to be different because the stuff bit is always a zero + andi x2, USBMASK ;[2] mask the interesting bits + breq stuffErr ;[3] if the stuff bit is a 1-bit something went wrong + mov x2, x1 ;[4] the next bit expects the last state to be in x2 + nop2 ;[5] + ;[6] + rjmp didunstuff3 ;[7] + ;[8] jump delay of rjmp didunstuffX @@ -380,17 +379,17 @@ unstuff3: ;[9] this is the jump delay of breq unstuffX sendNakAndReti: - ldi x3, USBPID_NAK ;[-18] - rjmp sendX3AndReti ;[-17] + ldi x3, USBPID_NAK ;[-18] + rjmp sendX3AndReti ;[-17] sendAckAndReti: - ldi cnt, USBPID_ACK ;[-17] + ldi cnt, USBPID_ACK ;[-17] sendCntAndReti: - mov x3, cnt ;[-16] + mov x3, cnt ;[-16] sendX3AndReti: - ldi YL, 20 ;[-15] x3==r20 address is 20 - ldi YH, 0 ;[-14] - ldi cnt, 2 ;[-13] -; rjmp usbSendAndReti fallthrough + ldi YL, 20 ;[-15] x3==r20 address is 20 + ldi YH, 0 ;[-14] + ldi cnt, 2 ;[-13] +; rjmp usbSendAndReti fallthrough ;usbSend: ;pointer to data in 'Y' @@ -398,88 +397,88 @@ sendX3AndReti: ;uses: x1...x4, btcnt, shift, cnt, Y ;Numbers in brackets are time since first bit of sync pattern is sent -usbSendAndReti: ; 12 cycles until SOP - in x2, USBDDR ;[-12] - ori x2, USBMASK ;[-11] - sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups) - in x1, USBOUT ;[-8] port mirror for tx loop - out USBDDR, x2 ;[-6] <- acquire bus - ldi x2, 0 ;[-6] init x2 (bitstuff history) because sync starts with 0 - ldi x4, USBMASK ;[-5] exor mask - ldi shift, 0x80 ;[-4] sync byte is first byte sent +usbSendAndReti: ; 12 cycles until SOP + in x2, USBDDR ;[-12] + ori x2, USBMASK ;[-11] + sbi USBOUT, USBMINUS ;[-10] prepare idle state; D+ and D- must have been 0 (no pullups) + in x1, USBOUT ;[-8] port mirror for tx loop + out USBDDR, x2 ;[-6] <- acquire bus + ldi x2, 0 ;[-6] init x2 (bitstuff history) because sync starts with 0 + ldi x4, USBMASK ;[-5] exor mask + ldi shift, 0x80 ;[-4] sync byte is first byte sent txByteLoop: - ldi bitcnt, 0x40 ;[-3]=[9] binary 01000000 -txBitLoop: ; the loop sends the first 7 bits of the byte - sbrs shift, 0 ;[-2]=[10] if we have to send a 1 don't change the line state - eor x1, x4 ;[-1]=[11] - out USBOUT, x1 ;[0] - ror shift ;[1] - ror x2 ;[2] transfers the last sent bit to the stuffing history + ldi bitcnt, 0x40 ;[-3]=[9] binary 01000000 +txBitLoop: ; the loop sends the first 7 bits of the byte + sbrs shift, 0 ;[-2]=[10] if we have to send a 1 don't change the line state + eor x1, x4 ;[-1]=[11] + out USBOUT, x1 ;[0] + ror shift ;[1] + ror x2 ;[2] transfers the last sent bit to the stuffing history didStuffN: - nop ;[3] - nop ;[4] - cpi x2, 0xfc ;[5] if we sent six consecutive ones - brcc bitstuffN ;[6] - lsr bitcnt ;[7] - brne txBitLoop ;[8] restart the loop while the 1 is still in the bitcount + nop ;[3] + nop ;[4] + cpi x2, 0xfc ;[5] if we sent six consecutive ones + brcc bitstuffN ;[6] + lsr bitcnt ;[7] + brne txBitLoop ;[8] restart the loop while the 1 is still in the bitcount ; transmit bit 7 - sbrs shift, 0 ;[9] - eor x1, x4 ;[10] + sbrs shift, 0 ;[9] + eor x1, x4 ;[10] didStuff7: - ror shift ;[11] - out USBOUT, x1 ;[0] transfer bit 7 to the pins - ror x2 ;[1] move the bit into the stuffing history - cpi x2, 0xfc ;[2] - brcc bitstuff7 ;[3] - ld shift, y+ ;[4] get next byte to transmit - dec cnt ;[5] decrement byte counter - brne txByteLoop ;[7] if we have more bytes start next one - ;[8] branch delay + ror shift ;[11] + out USBOUT, x1 ;[0] transfer bit 7 to the pins + ror x2 ;[1] move the bit into the stuffing history + cpi x2, 0xfc ;[2] + brcc bitstuff7 ;[3] + ld shift, y+ ;[4] get next byte to transmit + dec cnt ;[5] decrement byte counter + brne txByteLoop ;[7] if we have more bytes start next one + ;[8] branch delay ;make SE0: - cbr x1, USBMASK ;[8] prepare SE0 [spec says EOP may be 25 to 30 cycles] - lds x2, usbNewDeviceAddr;[9] - lsl x2 ;[11] we compare with left shifted address - out USBOUT, x1 ;[0] <-- out SE0 -- from now 2 bits = 24 cycles until bus idle - subi YL, 20 + 2 ;[1] Only assign address on data packets, not ACK/NAK in x3 - sbci YH, 0 ;[2] + cbr x1, USBMASK ;[8] prepare SE0 [spec says EOP may be 25 to 30 cycles] + lds x2, usbNewDeviceAddr ;[9] + lsl x2 ;[11] we compare with left shifted address + out USBOUT, x1 ;[0] <-- out SE0 -- from now 2 bits = 24 cycles until bus idle + subi YL, 20 + 2 ;[1] Only assign address on data packets, not ACK/NAK in x3 + sbci YH, 0 ;[2] ;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm: ;set address only after data packet was sent, not after handshake - breq skipAddrAssign ;[3] - sts usbDeviceAddr, x2 ; if not skipped: SE0 is one cycle longer + breq skipAddrAssign ;[3] + sts usbDeviceAddr, x2 ; if not skipped: SE0 is one cycle longer skipAddrAssign: ;end of usbDeviceAddress transfer - ldi x2, 1< 12 cycles per bit +; Numbers in brackets are clocks counted from center of last sync bit +; when instruction starts +;register use in receive loop to receive the data bytes: +; shift assembles the byte currently being received +; x1 holds the D+ and D- line state +; x2 holds the previous line state +; cnt holds the number of bytes left in the receive buffer +; x4 is used as temporary register +; x3 is used for unstuffing: when unstuffing the last received bit is inverted in shift (to prevent further +; unstuffing calls. In the same time the corresponding bit in x3 is cleared to mark the bit as beening iverted +; zl lower crc value and crc table index +; zh used for crc table accesses + + + +macro POP_STANDARD ; 18 cycles + pop cnt + pop x5 + pop x3 + pop x2 + pop x1 + pop shift + pop x4 + endm +macro POP_RETI ; 7 cycles + pop YH + pop YL + out SREG, YL + pop YL + endm + +;macro CRC_CLEANUP_AND_CHECK +; ; the last byte has already been xored with the lower crc byte, we have to do the table lookup and xor +; ; x3 is the higher crc byte, zl the lower one +; ldi ZH, hi8(usbCrcTableHigh);[+1] get the new high byte from the table +; lpm x2, Z ;[+2][+3][+4] +; ldi ZH, hi8(usbCrcTableLow);[+5] get the new low xor byte from the table +; lpm ZL, Z ;[+6][+7][+8] +; eor ZL, x3 ;[+7] xor the old high byte with the value from the table, x2:ZL now holds the crc value +; cpi ZL, 0x01 ;[+8] if the crc is ok we have a fixed remainder value of 0xb001 in x2:ZL (see usb spec) +; brne ignorePacket ;[+9] detected a crc fault -> paket is ignored and retransmitted by the host +; cpi x2, 0xb0 ;[+10] +; brne ignorePacket ;[+11] detected a crc fault -> paket is ignored and retransmitted by the host +; endm + + +USB_INTR_VECTOR: +;order of registers pushed: YL, SREG, YH, [sofError], x4, shift, x1, x2, x3, x5, cnt, ZL, ZH + push YL ;[-28] push only what is necessary to sync with edge ASAP + in YL, SREG ;[-26] + push YL ;[-25] + push YH ;[-23] +;---------------------------------------------------------------------------- +; Synchronize with sync pattern: +;---------------------------------------------------------------------------- +;sync byte (D-) pattern LSb to MSb: 01010100 [1 = idle = J, 0 = K] +;sync up with J to K edge during sync pattern -- use fastest possible loops +;The first part waits at most 1 bit long since we must be in sync pattern. +;YL is guarenteed to be < 0x80 because I flag is clear. When we jump to +;waitForJ, ensure that this prerequisite is met. +waitForJ: + inc YL + sbis USBIN, USBMINUS + brne waitForJ ; just make sure we have ANY timeout +waitForK: +;The following code results in a sampling window of < 1/4 bit which meets the spec. + sbis USBIN, USBMINUS ;[-17] + rjmp foundK ;[-16] + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK + sbis USBIN, USBMINUS + rjmp foundK +#if USB_COUNT_SOF + lds YL, usbSofCount + inc YL + sts usbSofCount, YL +#endif /* USB_COUNT_SOF */ +#ifdef USB_SOF_HOOK + USB_SOF_HOOK +#endif + rjmp sofError +foundK: ;[-15] +;{3, 5} after falling D- edge, average delay: 4 cycles +;bit0 should be at 30 (2.5 bits) for center sampling. Currently at 4 so 26 cylces till bit 0 sample +;use 1 bit time for setup purposes, then sample again. Numbers in brackets +;are cycles from center of first sync (double K) bit after the instruction + push x4 ;[-14] +; [---] ;[-13] + lds YL, usbInputBufOffset;[-12] used to toggle the two usb receive buffers +; [---] ;[-11] + clr YH ;[-10] + subi YL, lo8(-(usbRxBuf));[-9] [rx loop init] + sbci YH, hi8(-(usbRxBuf));[-8] [rx loop init] + push shift ;[-7] +; [---] ;[-6] + ldi shift, 0x80 ;[-5] the last bit is the end of byte marker for the pid receiver loop + clc ;[-4] the carry has to be clear for receipt of pid bit 0 + sbis USBIN, USBMINUS ;[-3] we want two bits K (sample 3 cycles too early) + rjmp haveTwoBitsK ;[-2] + pop shift ;[-1] undo the push from before + pop x4 ;[1] + rjmp waitForK ;[3] this was not the end of sync, retry +; The entire loop from waitForK until rjmp waitForK above must not exceed two +; bit times (= 24 cycles). + +;---------------------------------------------------------------------------- +; push more registers and initialize values while we sample the first bits: +;---------------------------------------------------------------------------- +haveTwoBitsK: + push x1 ;[0] + push x2 ;[2] + push x3 ;[4] + ldi x2, 1< jump back and store the byte + ori shift, 0x01 ;[11] invert the last received bit to prevent furhter unstuffing + in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors + andi x3, 0xFE ;[1] mark this bit as inverted (will be corrected before storing shift) + eor x1, x2 ;[2] x1 and x2 have to be different because the stuff bit is always a zero + andi x1, USBMASK ;[3] mask the interesting bits + breq stuffErr ;[4] if the stuff bit is a 1-bit something went wrong + mov x1, x2 ;[5] the next bit expects the last state to be in x1 + rjmp didunstuff0 ;[6] + ;[7] jump delay of rjmp didunstuffX + +unstuff1: ;[11] this is the jump delay of breq unstuffX + in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors + ori shift, 0x02 ;[1] invert the last received bit to prevent furhter unstuffing + andi x3, 0xFD ;[2] mark this bit as inverted (will be corrected before storing shift) + eor x2, x1 ;[3] x1 and x2 have to be different because the stuff bit is always a zero + andi x2, USBMASK ;[4] mask the interesting bits + breq stuffErr ;[5] if the stuff bit is a 1-bit something went wrong + mov x2, x1 ;[6] the next bit expects the last state to be in x2 + nop2 ;[7] + ;[8] + rjmp didunstuff1 ;[9] + ;[10] jump delay of rjmp didunstuffX + +unstuff2: ;[9] this is the jump delay of breq unstuffX + ori shift, 0x04 ;[10] invert the last received bit to prevent furhter unstuffing + andi x3, 0xFB ;[11] mark this bit as inverted (will be corrected before storing shift) + in x2, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors + eor x1, x2 ;[1] x1 and x2 have to be different because the stuff bit is always a zero + andi x1, USBMASK ;[2] mask the interesting bits + breq stuffErr ;[3] if the stuff bit is a 1-bit something went wrong + mov x1, x2 ;[4] the next bit expects the last state to be in x1 + nop2 ;[5] + ;[6] + rjmp didunstuff2 ;[7] + ;[8] jump delay of rjmp didunstuffX + +unstuff3: ;[9] this is the jump delay of breq unstuffX + ori shift, 0x08 ;[10] invert the last received bit to prevent furhter unstuffing + andi x3, 0xF7 ;[11] mark this bit as inverted (will be corrected before storing shift) + in x1, USBIN ;[0] we have some free cycles so we could check for bit stuffing errors + eor x2, x1 ;[1] x1 and x2 have to be different because the stuff bit is always a zero + andi x2, USBMASK ;[2] mask the interesting bits + breq stuffErr ;[3] if the stuff bit is a 1-bit something went wrong + mov x2, x1 ;[4] the next bit expects the last state to be in x2 + nop2 ;[5] + ;[6] + rjmp didunstuff3 ;[7] + ;[8] jump delay of rjmp didunstuffX + + + +; the include has to be here due to branch distance restirctions +#include "asmcommon.inc" + + + +; USB spec says: +; idle = J +; J = (D+ = 0), (D- = 1) +; K = (D+ = 1), (D- = 0) +; Spec allows 7.5 bit times from EOP to SOP for replies +; 7.5 bit times is 90 cycles. ...there is plenty of time + + +sendNakAndReti: + ldi x3, USBPID_NAK ;[-18] + rjmp sendX3AndReti ;[-17] +sendAckAndReti: + ldi cnt, USBPID_ACK ;[-17] +sendCntAndReti: + mov x3, cnt ;[-16] +sendX3AndReti: + ldi YL, 20 ;[-15] x3==r20 address is 20 + ldi YH, 0 ;[-14] + ldi cnt, 2 ;[-13] +; rjmp usbSendAndReti fallthrough + +;usbSend: +;pointer to data in 'Y' +;number of bytes in 'cnt' -- including sync byte [range 2 ... 12] +;uses: x1...x4, btcnt, shift, cnt, Y +;Numbers in brackets are time since first bit of sync pattern is sent + +usbSendAndReti: ; 12 cycles until SOP + in x2, USBDDR ;[-12] + ori x2, USBMASK ;[-11] + sbi USBOUT, USBMINUS;[-10] prepare idle state; D+ and D- must have been 0 (no pullups) + in x1, USBOUT ;[-8] port mirror for tx loop + out USBDDR, x2 ;[-6] <- acquire bus + ldi x2, 0 ;[-6] init x2 (bitstuff history) because sync starts with 0 + ldi x4, USBMASK ;[-5] exor mask + ldi shift, 0x80 ;[-4] sync byte is first byte sent +txByteLoop: + ldi bitcnt, 0x40 ;[-3]=[9] binary 01000000 +txBitLoop: ; the loop sends the first 7 bits of the byte + sbrs shift, 0 ;[-2]=[10] if we have to send a 1 don't change the line state + eor x1, x4 ;[-1]=[11] + out USBOUT, x1 ;[0] + ror shift ;[1] + ror x2 ;[2] transfers the last sent bit to the stuffing history +didStuffN: + nop ;[3] + nop ;[4] + cpi x2, 0xfc ;[5] if we sent six consecutive ones + brcc bitstuffN ;[6] + lsr bitcnt ;[7] + brne txBitLoop ;[8] restart the loop while the 1 is still in the bitcount + +; transmit bit 7 + sbrs shift, 0 ;[9] + eor x1, x4 ;[10] +didStuff7: + ror shift ;[11] + out USBOUT, x1 ;[0] transfer bit 7 to the pins + ror x2 ;[1] move the bit into the stuffing history + cpi x2, 0xfc ;[2] + brcc bitstuff7 ;[3] + ld shift, y+ ;[4] get next byte to transmit + dec cnt ;[5] decrement byte counter + brne txByteLoop ;[7] if we have more bytes start next one + ;[8] branch delay + +;make SE0: + cbr x1, USBMASK ;[8] prepare SE0 [spec says EOP may be 25 to 30 cycles] + lds x2, usbNewDeviceAddr;[9] + lsl x2 ;[11] we compare with left shifted address + out USBOUT, x1 ;[0] <-- out SE0 -- from now 2 bits = 24 cycles until bus idle + subi YL, 20 + 2 ;[1] Only assign address on data packets, not ACK/NAK in x3 + sbci YH, 0 ;[2] +;2006-03-06: moved transfer of new address to usbDeviceAddr from C-Code to asm: +;set address only after data packet was sent, not after handshake + breq skipAddrAssign ;[3] + sts usbDeviceAddr, x2 ; if not skipped: SE0 is one cycle longer +skipAddrAssign: +;end of usbDeviceAddress transfer + ldi x2, 1<