X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/f7cde02b80c001875231c8ef21211214ebc742ed..7a9b3d3641e1bc97d2826b4865b3cedb11099e62:/Projects/AVRISP/AVRISP.txt

diff --git a/Projects/AVRISP/AVRISP.txt b/Projects/AVRISP/AVRISP.txt
index a9d550786..c15c27fa6 100644
--- a/Projects/AVRISP/AVRISP.txt
+++ b/Projects/AVRISP/AVRISP.txt
@@ -8,17 +8,12 @@
  *
  *  \section SSec_Compat Demo Compatibility:
  *
- *  The following table indicates what microcontrollers are compatible with this demo.
- *
- *  - AT90USB1287
- *  - AT90USB1286
- *  - AT90USB647
- *  - AT90USB646
- *  - ATMEGA32U6
- *  - ATMEGA32U4
- *  - ATMEGA16U4
- *  - AT90USB162
- *  - AT90USB82
+ *  The following list indicates what microcontrollers are compatible with this demo.
+ *
+ *  - Series 7 USB AVRs
+ *  - Series 6 USB AVRs
+ *  - Series 4 USB AVRs
+ *  - Series 2 USB AVRs
  *
  *  \section SSec_Info USB Information:
  *
@@ -59,49 +54,101 @@
  *  drivers. When promted, direct your OS to install Atmel's AVRISP-MKII drivers provided with AVRStudio.
  *
  *  Note that this design currently has several limitations:
- *    - Minimum target clock speed of 500KHz due to hardware SPI used
+ *    - Minimum ISP target clock speed of 500KHz due to hardware SPI used
  *    - No reversed/shorted target connector detection and notification
  *
- *  On AVR models with an ADC converter, ACC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be
+ *  On AVR models with an ADC converter, AVCC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be
  *  set to an appropriate ADC channel number in the project makefile for VTARGET detection to operate correctly. On models
  *  without an ADC converter, VTARGET will report at a fixed 5V level.
  *
- *  Connections to the device are simple:
+ *  When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the
+ *  XPLAIN's XMEGA AVR, and will enable only PDI programming support.
+ *
+ *
+ *  Connections to the device for SPI programming (when enabled):
  *
  *  <table>
  *   <tr>
  *    <td><b>Programmer Pin:</b></td>
  *    <td><b>Target Device Pin:</b></td>
- *   </tr>
- *   <tr>
- *    <td>MOSI</td>
- *    <td>PDI</td>
+ *    <td><b>ISP 6 Pin Layout:</b></td>
  *   </tr>
  *   <tr>
  *    <td>MISO</td>
  *    <td>PDO</td>
+ *    <td>1</td>
+ *   </tr>
+ *   <tr>
+ *    <td>ADCx <b><sup>1</sup></b></td>
+ *    <td>VTARGET</td>
+ *    <td>2</td>
  *   </tr>
  *   <tr>
  *    <td>SCLK</td>
  *    <td>SCLK</td>
+ *    <td>3</td>
+ *   </tr>
+ *   <tr>
+ *    <td>MOSI</td>
+ *    <td>PDI</td>
+ *    <td>4</td>
+ *   </tr>
+ *   <tr>
+ *    <td>PORTx.y <b><sup>2</sup></b></td>
+ *    <td>/RESET</td>
+ *    <td>5</td>
  *   </tr>
  *   <tr>
  *    <td>GND</td>
  *    <td>GND</td>
+ *    <td>6</td>
+ *   </tr>
+ *  </table>
+ *
+ *  <b><sup>1</sup></b> <i>Optional, see \ref SSec_Options section - for USB AVRs with ADC modules only</i> \n
+ *  <b><sup>2</sup></b> <i>See \ref SSec_Options section</i>
+ *
+ *
+ *  Connections to the device for PDI programming (when enabled):
+ *
+ *  <table>
+ *   <tr>
+ *    <td><b>Programmer Pin:</b></td>
+ *    <td><b>Target Device Pin:</b></td>
+ *    <td><b>PDI 6 Pin Layout:</b></td>
+ *   </tr>
+ *   <tr>
+ *    <td>MISO</td>
+ *    <td>DATA</td>
+ *    <td>1</td>
  *   </tr>
  *   <tr>
  *    <td>ADCx <b><sup>1</sup></b></td>
  *    <td>VTARGET</td>
+ *    <td>2</td>
+ *   </tr>
+ *   <tr>
+ *    <td>N/A</td>
+ *    <td>N/A</td>
+ *    <td>3</td>
+ *   </tr>
+ *   <tr>
+ *    <td>N/A</td>
+ *    <td>N/A</td>
+ *    <td>4</td>
  *   </tr>
  *   <tr>
  *    <td>PORTx.y <b><sup>2</sup></b></td>
- *    <td>/RESET</td>
+ *    <td>CLOCK</td>
+ *    <td>5</td>
+ *   </tr>
+ *   <tr>
+ *    <td>GND</td>
+ *    <td>GND</td>
+ *    <td>6</td>
  *   </tr>
  *  </table>
  *
- *  <b><sup>1</sup></b> <i>Optional, see \ref SSec_Options section - for USB AVRs with ADC modules only</i> \n
- *  <b><sup>2</sup></b> <i>See \ref SSec_Options section</i>
- *
  *  \section SSec_Options Project Options
  *
  *  The following defines can be found in this demo, which can control the demo behaviour when defined, or changed in value.
@@ -115,22 +162,35 @@
  *   <tr>
  *    <td>RESET_LINE_PORT</td>
  *    <td>Makefile CDEFS</td>
- *    <td>PORT register for the programmer's target RESET line.</td>
+ *    <td>PORT register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>
  *   </tr>
  *   <tr>
  *    <td>RESET_LINE_DDR</td>
  *    <td>Makefile CDEFS</td>
- *    <td>DDR register for the programmer's target RESET line.</td>
+ *    <td>DDR register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>
  *   </tr>
  *   <tr>
  *    <td>RESET_LINE_MASK</td>
  *    <td>Makefile CDEFS</td>
- *    <td>Mask for the programmer's target RESET line on the chosen port. <b>Must not be the AVR's /SS pin.</b></td>
+ *    <td>Mask for the programmer's target RESET line on the chosen port. <b>Must not be the AVR's /SS pin</b>, as the
+ *        target pins are tri-stated when not in use, and low signals on the /SS pin will force SPI slave mode when the
+ *        pin is configured as an input. When in PDI programming mode, this is the target clock pin.
+ *        <i>Ignored when compiled for the XPLAIN board.</i></td>
  *   </tr>
  *   <tr>
  *    <td>VTARGET_ADC_CHANNEL</td>
  *    <td>Makefile CDEFS</td>
  *    <td>ADC channel number (on supported AVRs) to use for VTARGET level detection.</td> 
  *   </tr>
+ *   <tr>
+ *    <td>ENABLE_ISP_PROTOCOL</td>
+ *    <td>Makefile CDEFS</td>
+ *    <td>Define to enable SPI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>  
+ *   </tr>
+ *   <tr>
+ *    <td>ENABLE_PDI_PROTOCOL</td>
+ *    <td>Makefile CDEFS</td>
+ *    <td>Define to enable XMEGA PDI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>  
+ *   </tr>
  *  </table>
  */