X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/f201f6697b7f99b63389509b42112026b8f6f76f..deb6fce7bc7c897242eccd02bf9da5e5191efb58:/LUFA/Platform/UC3/ClockManagement.h

diff --git a/LUFA/Platform/UC3/ClockManagement.h b/LUFA/Platform/UC3/ClockManagement.h
index ef2a1b56e..51cb0ff6d 100644
--- a/LUFA/Platform/UC3/ClockManagement.h
+++ b/LUFA/Platform/UC3/ClockManagement.h
@@ -1,13 +1,13 @@
 /*
              LUFA Library
-     Copyright (C) Dean Camera, 2011.
+     Copyright (C) Dean Camera, 2012.
 
   dean [at] fourwalledcubicle [dot] com
            www.lufa-lib.org
 */
 
 /*
-  Copyright 2011  Dean Camera (dean [at] fourwalledcubicle [dot] com)
+  Copyright 2012  Dean Camera (dean [at] fourwalledcubicle [dot] com)
 
   Permission to use, copy, modify, distribute, and sell this
   software and its documentation for any purpose is hereby granted
@@ -35,8 +35,8 @@
  *  of the various clocks within the device to clock the various peripherals.
  */
 
-/** \ingroup Group_PlatformDrivers
- *  \defgroup Group_PlatformDrivers_UC3Clocks UC3 Clock Management Driver - LUFA/Platform/UC3/ClockManagement.h
+/** \ingroup Group_PlatformDrivers_UC3
+ *  \defgroup Group_PlatformDrivers_UC3Clocks Clock Management Driver - LUFA/Platform/UC3/ClockManagement.h
  *  \brief Module Clock Driver for the AVR32 UC3 microcontrollers.
  *
  *  \section Sec_Dependencies Module Source Dependencies
@@ -50,16 +50,16 @@
  *  Usage Example:
  *  \code
  *		#include <LUFA/Platform/UC3/ClockManagement.h>
- *
+ *      
  *		void main(void)
  *		{
  *			// Start the master external oscillator which will be used as the main clock reference
  *			AVR32CLK_StartExternalOscillator(0, EXOSC_MODE_8MHZ_OR_MORE, EXOSC_START_0CLK);
- *
+ *          
  *			// Start the PLL for the CPU clock, switch CPU to it
  *			AVR32CLK_StartPLL(0, CLOCK_SRC_OSC0, 12000000, F_CPU);
  *			AVR32CLK_SetCPUClockSource(CLOCK_SRC_PLL0, F_CPU);
- *
+ *          
  *			// Start the PLL for the USB Generic Clock module
  *			AVR32CLK_StartPLL(1, CLOCK_SRC_OSC0, 12000000, 48000000);
  *		}
@@ -91,16 +91,16 @@
 				EXOSC_MODE_8MHZ_OR_MORE  = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3, /**< External crystal oscillator equal to or faster than 8MHz. */
 			};
 
-			/** Enum for the possible external oscillator statup times. */
+			/** Enum for the possible external oscillator startup times. */
 			enum UC3_Extern_OSC_ClockStartup_t
 			{
 				EXOSC_START_0CLK         = AVR32_PM_OSCCTRL0_STARTUP_0_RCOSC,     /**< Immediate startup, no delay. */
-				EXOSC_START_64CLK        = AVR32_PM_OSCCTRL0_STARTUP_64_RCOSC,    /**< Wait 64 clock cyles before startup for stability. */
-				EXOSC_START_128CLK       = AVR32_PM_OSCCTRL0_STARTUP_128_RCOSC,   /**< Wait 128 clock cyles before startup for stability. */
-				EXOSC_START_2048CLK      = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC,  /**< Wait 2048 clock cyles before startup for stability. */
-				EXOSC_START_4096CLK      = AVR32_PM_OSCCTRL0_STARTUP_4096_RCOSC,  /**< Wait 4096 clock cyles before startup for stability. */
-				EXOSC_START_8192CLK      = AVR32_PM_OSCCTRL0_STARTUP_8192_RCOSC,  /**< Wait 8192 clock cyles before startup for stability. */
-				EXOSC_START_16384CLK     = AVR32_PM_OSCCTRL0_STARTUP_16384_RCOSC, /**< Wait 16384 clock cyles before startup for stability. */
+				EXOSC_START_64CLK        = AVR32_PM_OSCCTRL0_STARTUP_64_RCOSC,    /**< Wait 64 clock cycles before startup for stability. */
+				EXOSC_START_128CLK       = AVR32_PM_OSCCTRL0_STARTUP_128_RCOSC,   /**< Wait 128 clock cycles before startup for stability. */
+				EXOSC_START_2048CLK      = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC,  /**< Wait 2048 clock cycles before startup for stability. */
+				EXOSC_START_4096CLK      = AVR32_PM_OSCCTRL0_STARTUP_4096_RCOSC,  /**< Wait 4096 clock cycles before startup for stability. */
+				EXOSC_START_8192CLK      = AVR32_PM_OSCCTRL0_STARTUP_8192_RCOSC,  /**< Wait 8192 clock cycles before startup for stability. */
+				EXOSC_START_16384CLK     = AVR32_PM_OSCCTRL0_STARTUP_16384_RCOSC, /**< Wait 16384 clock cycles before startup for stability. */
 			};
 
 			/** Enum for the possible module clock sources. */
@@ -162,7 +162,7 @@
 
 			/** Starts the given PLL of the UC3 microcontroller, with the given options. This routine blocks until the PLL is ready for use.
 			 *
-			 *  \note The output frequency must be equal to or greater than the source frequency.
+			 *  \attention The output frequency must be equal to or greater than the source frequency.
 			 *
 			 *  \param[in] Channel     Index of the PLL to start.
 			 *  \param[in] Source      Clock source for the PLL, a value from \ref UC3_System_ClockSource_t.