X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/eee252603be67c539f9986cde76454f756e55d95..77c0786f90ce57651d9039b9dedde0e9a3c9da9d:/LUFA/Drivers/Peripheral/XMEGA/SPI_XMEGA.h diff --git a/LUFA/Drivers/Peripheral/XMEGA/SPI_XMEGA.h b/LUFA/Drivers/Peripheral/XMEGA/SPI_XMEGA.h index 764f05525..96e5f76ad 100644 --- a/LUFA/Drivers/Peripheral/XMEGA/SPI_XMEGA.h +++ b/LUFA/Drivers/Peripheral/XMEGA/SPI_XMEGA.h @@ -1,13 +1,13 @@ /* LUFA Library - Copyright (C) Dean Camera, 2012. + Copyright (C) Dean Camera, 2019. dean [at] fourwalledcubicle [dot] com www.lufa-lib.org */ /* - Copyright 2012 Dean Camera (dean [at] fourwalledcubicle [dot] com) + Copyright 2019 Dean Camera (dean [at] fourwalledcubicle [dot] com) Permission to use, copy, modify, distribute, and sell this software and its documentation for any purpose is hereby granted @@ -40,7 +40,7 @@ /** \ingroup Group_SPI * \defgroup Group_SPI_XMEGA SPI Peripheral Driver (XMEGA) * - * \section Sec_ModDescription Module Description + * \section Sec_SPI_XMEGA_ModDescription Module Description * Driver for the hardware SPI port(s) available on XMEGA AVR microcontroller models. This * module provides an easy to use driver for the setup and transfer of data over the AVR's * SPI ports. @@ -53,17 +53,17 @@ * SPI_Init(&SPIC, * SPI_SPEED_FCPU_DIV_2 | SPI_ORDER_MSB_FIRST | SPI_SCK_LEAD_FALLING | * SPI_SAMPLE_TRAILING | SPI_MODE_MASTER); - * + * * // Send several bytes, ignoring the returned data * SPI_SendByte(&SPIC, 0x01); * SPI_SendByte(&SPIC, 0x02); * SPI_SendByte(&SPIC, 0x03); - * + * * // Receive several bytes, sending a dummy 0x00 byte each time * uint8_t Byte1 = SPI_ReceiveByte(&SPIC); * uint8_t Byte2 = SPI_ReceiveByte(&SPIC); * uint8_t Byte3 = SPI_ReceiveByte(&SPIC); - * + * * // Send a byte, and store the received byte from the same transaction * uint8_t ResponseByte = SPI_TransferByte(&SPIC, 0xDC); * \endcode @@ -96,7 +96,7 @@ /* Public Interface - May be used in end-application: */ /* Macros: */ /** \name SPI Prescaler Configuration Masks */ - //@{ + /**@{*/ /** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 2. */ #define SPI_SPEED_FCPU_DIV_2 SPI_USE_DOUBLESPEED @@ -117,43 +117,43 @@ /** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 128. */ #define SPI_SPEED_FCPU_DIV_128 (3 << SPI_PRESCALER_gp) - //@} + /**@}*/ /** \name SPI SCK Polarity Configuration Masks */ - //@{ + /**@{*/ /** SPI clock polarity mask for \ref SPI_Init(). Indicates that the SCK should lead on the rising edge. */ #define SPI_SCK_LEAD_RISING 0 /** SPI clock polarity mask for \ref SPI_Init(). Indicates that the SCK should lead on the falling edge. */ #define SPI_SCK_LEAD_FALLING SPI_MODE1_bm - //@} + /**@}*/ /** \name SPI Sample Edge Configuration Masks */ - //@{ + /**@{*/ /** SPI data sample mode mask for \ref SPI_Init(). Indicates that the data should sampled on the leading edge. */ #define SPI_SAMPLE_LEADING 0 /** SPI data sample mode mask for \ref SPI_Init(). Indicates that the data should be sampled on the trailing edge. */ #define SPI_SAMPLE_TRAILING SPI_MODE0_bm - //@} + /**@}*/ /** \name SPI Data Ordering Configuration Masks */ - //@{ + /**@{*/ /** SPI data order mask for \ref SPI_Init(). Indicates that data should be shifted out MSB first. */ #define SPI_ORDER_MSB_FIRST 0 /** SPI data order mask for \ref SPI_Init(). Indicates that data should be shifted out LSB first. */ #define SPI_ORDER_LSB_FIRST SPI_DORD_bm - //@} + /**@}*/ /** \name SPI Mode Configuration Masks */ - //@{ + /**@{*/ /** SPI mode mask for \ref SPI_Init(). Indicates that the SPI interface should be initialized into slave mode. */ #define SPI_MODE_SLAVE 0 /** SPI mode mask for \ref SPI_Init(). Indicates that the SPI interface should be initialized into master mode. */ #define SPI_MODE_MASTER SPI_MASTER_bm - //@} + /**@}*/ /* Inline Functions: */ /** Initializes the SPI subsystem, ready for transfers. Must be called before calling any other @@ -164,6 +164,8 @@ * \c SPI_SCK_*, \c SPI_SAMPLE_*, \c SPI_ORDER_* and \c SPI_MODE_* masks. */ static inline void SPI_Init(SPI_t* const SPI, + const uint8_t SPIOptions) ATTR_NON_NULL_PTR_ARG(1); + static inline void SPI_Init(SPI_t* const SPI, const uint8_t SPIOptions) { SPI->CTRL = (SPIOptions | SPI_ENABLE_bm); @@ -173,6 +175,7 @@ * * \param[in,out] SPI Pointer to the base of the SPI peripheral within the device. */ + static inline void SPI_Disable(SPI_t* const SPI) ATTR_NON_NULL_PTR_ARG(1); static inline void SPI_Disable(SPI_t* const SPI) { SPI->CTRL &= ~SPI_ENABLE_bm; @@ -184,7 +187,7 @@ * * \return \ref SPI_MODE_MASTER if the interface is currently in SPI Master mode, \ref SPI_MODE_SLAVE otherwise */ - static inline uint8_t SPI_GetCurrentMode(SPI_t* const SPI) ATTR_ALWAYS_INLINE; + static inline uint8_t SPI_GetCurrentMode(SPI_t* const SPI) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1); static inline uint8_t SPI_GetCurrentMode(SPI_t* const SPI) { return (SPI->CTRL & SPI_MASTER_bm); @@ -198,7 +201,7 @@ * \return Response byte from the attached SPI device. */ static inline uint8_t SPI_TransferByte(SPI_t* const SPI, - const uint8_t Byte) ATTR_ALWAYS_INLINE; + const uint8_t Byte) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1); static inline uint8_t SPI_TransferByte(SPI_t* const SPI, const uint8_t Byte) { @@ -214,7 +217,7 @@ * \param[in] Byte Byte to send through the SPI interface. */ static inline void SPI_SendByte(SPI_t* const SPI, - const uint8_t Byte) ATTR_ALWAYS_INLINE; + const uint8_t Byte) ATTR_ALWAYS_INLINE ATTR_NON_NULL_PTR_ARG(1); static inline void SPI_SendByte(SPI_t* const SPI, const uint8_t Byte) { @@ -229,7 +232,7 @@ * * \return The response byte from the attached SPI device. */ - static inline uint8_t SPI_ReceiveByte(SPI_t* const SPI) ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT; + static inline uint8_t SPI_ReceiveByte(SPI_t* const SPI) ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT ATTR_NON_NULL_PTR_ARG(1); static inline uint8_t SPI_ReceiveByte(SPI_t* const SPI) { SPI->DATA = 0;