X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/cb779e3d7d32d7c43e0a45bb526de0a04135b0c7..a8b66f318dda3cc18dfcedaa3af3d01ab68b82e8:/Projects/XPLAINBridge/Lib/SoftUART.c

diff --git a/Projects/XPLAINBridge/Lib/SoftUART.c b/Projects/XPLAINBridge/Lib/SoftUART.c
index 4b38a0bd2..7667bfa31 100644
--- a/Projects/XPLAINBridge/Lib/SoftUART.c
+++ b/Projects/XPLAINBridge/Lib/SoftUART.c
@@ -67,11 +67,11 @@ void SoftUART_Init(void)
 	SoftUART_SetBaud(9600);
 
 	/* Setup reception timer compare ISR */
-	TIMSK1 = (1 << ICIE1);
+	TIMSK1 = (1 << OCIE1A);
 
 	/* Setup transmission timer compare ISR and start the timer */
-	TIMSK3 = (1 << ICIE3);
-	TCCR3B = ((1 << CS30) | (1 << WGM33) | (1 << WGM32));
+	TIMSK3 = (1 << OCIE3A);
+	TCCR3B = ((1 << CS30) | (1 << WGM32));
 }
 
 /** ISR to detect the start of a bit being sent to the software UART. */
@@ -90,12 +90,12 @@ ISR(INT0_vect, ISR_BLOCK)
 		EIMSK = 0;
 
 		/* Start the reception timer */
-		TCCR1B = ((1 << CS10) | (1 << WGM13) | (1 << WGM12));
+		TCCR1B = ((1 << CS10) | (1 << WGM12));
 	}
 }
 
 /** ISR to manage the reception of bits to the software UART. */
-ISR(TIMER1_CAPT_vect, ISR_BLOCK)
+ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 {
 	/* Cache the current RX pin value for later checking */
 	uint8_t SRX_Cached = (SRXPIN & (1 << SRX));
@@ -125,7 +125,7 @@ ISR(TIMER1_CAPT_vect, ISR_BLOCK)
 }
 
 /** ISR to manage the transmission of bits via the software UART. */
-ISR(TIMER3_CAPT_vect, ISR_BLOCK)
+ISR(TIMER3_COMPA_vect, ISR_BLOCK)
 {
 	/* Check if transmission has finished */
 	if (TX_BitsRemaining)