X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/cb779e3d7d32d7c43e0a45bb526de0a04135b0c7..64fe1cd0b2be01fd7b377736a85c1bd88a5fd429:/LUFA/Drivers/USB/LowLevel/Endpoint.h

diff --git a/LUFA/Drivers/USB/LowLevel/Endpoint.h b/LUFA/Drivers/USB/LowLevel/Endpoint.h
index 54a2d8dd8..c8f9cbfd5 100644
--- a/LUFA/Drivers/USB/LowLevel/Endpoint.h
+++ b/LUFA/Drivers/USB/LowLevel/Endpoint.h
@@ -146,6 +146,8 @@
 
 	/* Public Interface - May be used in end-application: */
 		/* Macros: */
+			/** \name Endpoint Direction Masks */
+			//@{
 			/** Endpoint data direction mask for \ref Endpoint_ConfigureEndpoint(). This indicates that the endpoint
 			 *  should be initialized in the OUT direction - i.e. data flows from host to device.
 			 */
@@ -155,7 +157,10 @@
 			 *  should be initialized in the IN direction - i.e. data flows from device to host.
 			 */
 			#define ENDPOINT_DIR_IN                         (1 << EPDIR)
-
+			//@}
+			
+			/** \name Endpoint Bank Mode Masks */
+			//@{
 			/** Mask for the bank mode selection for the \ref Endpoint_ConfigureEndpoint() macro. This indicates
 			 *  that the endpoint should have one single bank, which requires less USB FIFO memory but results
 			 *  in slower transfers as only one USB device (the AVR or the host) can access the endpoint's
@@ -169,7 +174,8 @@
 			 *  accesses the second bank.
 			 */
 			#define ENDPOINT_BANK_DOUBLE                    (1 << EPBK0)
-
+			//@}
+			
 			/** Endpoint address for the default control endpoint, which always resides in address 0. This is
 			 *  defined for convenience to give more readable code when used with the endpoint macros.
 			 */
@@ -267,7 +273,8 @@
 			 *                        More banks uses more USB DPRAM, but offers better performance. Isochronous type
 			 *                        endpoints <b>must</b> have at least two banks.
 			 *
-			 *  \note Endpoints <b>must</b> be configured in ascending order, or bank corruption will occur.
+			 *  \note When the ORDERED_EP_CONFIG compile time option is used, Endpoints <b>must</b> be configured in ascending
+			 *        order, or bank corruption will occur.
 			 *        \n\n
 			 *
 			 *  \note Certain models of USB AVR's endpoints may have different maximum packet sizes based on the endpoint's
@@ -394,6 +401,35 @@
 				return ((UECONX & (1 << EPEN)) ? true : false);
 			}
 
+			/** Aborts all pending IN transactions on the currently selected endpoint, once the bank
+			 *  has been queued for transmission to the host via \ref Endpoint_ClearIN(). This function
+			 *  will terminate all queued transactions, resetting the endpoint banks ready for a new
+			 *  packet.
+			 *
+			 *  \ingroup Group_EndpointPacketManagement
+			 */
+			static inline void Endpoint_AbortPendingIN(void)
+			{
+				while (UESTA0X & (0x03 << NBUSYBK0))
+				{
+					UEINTX |= (1 << RXOUTI);
+					while (UEINTX & (1 << RXOUTI));
+				}
+			}
+			
+			/** Retrieves the number of busy banks in the currently selected endpoint, which have been queued for
+			 *  transmission via the \ref Endpoint_ClearIN() command, or are awaiting acknowledgement via the
+			 *  \ref Endpoint_ClearOUT() command.
+			 *
+			 *  \ingroup Group_EndpointPacketManagement
+			 *
+			 *  \return Total number of busy banks in the selected endpoint.
+			 */
+			static inline uint8_t Endpoint_GetBusyBanks(void)
+			{
+				return (UESTA0X & (0x03 << NBUSYBK0));
+			}
+
 			/** Determines if the currently selected endpoint may be read from (if data is waiting in the endpoint
 			 *  bank and the endpoint is an OUT direction, or if the bank is not yet full if the endpoint is an IN
 			 *  direction). This function will return false if an error has occurred in the endpoint, if the endpoint