X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/c24027f3b5f1ca7bceababc82ea5b897b18dbac1..9a1560dc050f79fd189838a87ce623e79ff48677:/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c

diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
index 957084c0b..e75adbe10 100644
--- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
+++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
@@ -80,10 +80,6 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 	}
 	else
 	{
-		/* If not sending or receiving, just exit */
-		if (!(SoftUSART_BitCount))
-		  return;
-
 		/* If at falling clock edge and we are in receive mode, abort */
 		if (!IsSending)
 		  return;
@@ -160,9 +156,8 @@ void XPROGTarget_EnableTargetPDI(void)
 	PORTD |= (1 << 3);
 	_delay_us(1);
 	
-	/* Set up the synchronous USART for XMEGA communications - 
-	   8 data bits, even parity, 2 stop bits */
-	UBRR1  = (F_CPU / 500000UL);
+	/* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */
+	UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);
 	UCSR1B = (1 << TXEN1);
 	UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 #else
@@ -175,10 +170,9 @@ void XPROGTarget_EnableTargetPDI(void)
 	_delay_us(1);
 
 	/* Fire timer compare channel A ISR to manage the software USART */
-	OCR1A   = BITS_BETWEEN_USART_CLOCKS;
-	OCR1B   = BITS_BETWEEN_USART_CLOCKS;
-	TCCR1B  = (1 << WGM12) | (1 << CS10);
-	TIMSK1  = (1 << OCIE1A);
+	OCR1A  = BITS_BETWEEN_USART_CLOCKS;
+	TCCR1B = (1 << WGM12) | (1 << CS10);
+	TIMSK1 = (1 << OCIE1A);
 #endif
 
 	/* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
@@ -201,9 +195,8 @@ void XPROGTarget_EnableTargetTPI(void)
 	DDRD |=  (1 << 5) | (1 << 3);
 	DDRD &= ~(1 << 2);
 		
-	/* Set up the synchronous USART for TINY communications - 
-	   8 data bits, even parity, 2 stop bits */
-	UBRR1  = (F_CPU / 500000UL);
+	/* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */
+	UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);
 	UCSR1B = (1 << TXEN1);
 	UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 #else
@@ -215,9 +208,9 @@ void XPROGTarget_EnableTargetTPI(void)
 	BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 
 	/* Fire timer capture channel ISR to manage the software USART */
-	ICR1    = BITS_BETWEEN_USART_CLOCKS;
-	TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
-	TIMSK1  = (1 << ICIE1);
+	ICR1   = BITS_BETWEEN_USART_CLOCKS;
+	TCCR1B = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
+	TIMSK1 = (1 << ICIE1);
 #endif
 
 	/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
@@ -232,26 +225,18 @@ void XPROGTarget_DisableTargetPDI(void)
 	XPROGTarget_SetRxMode();
 
 #if defined(XPROG_VIA_HARDWARE_USART)
-	/* Set /RESET high for a one millisecond to ensure target device is restarted */
-	PORTD |= (1 << 5);
-	_delay_ms(1);
-
 	/* Turn off receiver and transmitter of the USART, clear settings */
-	UCSR1A |= (1 << TXC1) | (1 << RXC1);
+	UCSR1A  = ((1 << TXC1) | (1 << RXC1));
 	UCSR1B  = 0;
 	UCSR1C  = 0;
 
-	/* Set all USART lines as input, tristate */
+	/* Tristate all pins */
 	DDRD  &= ~((1 << 5) | (1 << 3));
 	PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 #else
 	/* Turn off software USART management timer */
 	TCCR1B = 0;
 
-	/* Set /RESET high for a one millisecond to ensure target device is restarted */
-	BITBANG_PDICLOCK_PORT |= BITBANG_PDICLOCK_MASK;
-	_delay_ms(1);
-
 	/* Set DATA and CLOCK lines to inputs */
 	BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 	BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;
@@ -353,6 +338,9 @@ uint8_t XPROGTarget_ReceiveByte(void)
 		}	
 	}
 	
+	if (TimeoutMSRemaining)
+	  TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
+
 	return UDR1;
 #else
 	/* Wait until a byte has been received before reading */
@@ -414,8 +402,15 @@ static void XPROGTarget_SetTxMode(void)
 		
 	IsSending = true;
 #else
-	while (SoftUSART_BitCount);
-
+	while (SoftUSART_BitCount && TimeoutMSRemaining)
+	{	
+		if (TIFR0 & (1 << OCF0A))
+		{
+			TIFR0 |= (1 << OCF0A);
+			TimeoutMSRemaining--;
+		}
+	}
+	
 	/* Wait for a full cycle of the clock */
 	SoftUSART_Data     = 0x0001;
 	SoftUSART_BitCount = 1;
@@ -448,28 +443,46 @@ static void XPROGTarget_SetRxMode(void)
 	DDRD   &= ~(1 << 3);
 	PORTD  &= ~(1 << 3);
 #else
-	while (SoftUSART_BitCount);
+	while (SoftUSART_BitCount && TimeoutMSRemaining)
+	{	
+		if (TIFR0 & (1 << OCF0A))
+		{
+			TIFR0 |= (1 << OCF0A);
+			TimeoutMSRemaining--;
+		}
+	}
 
 	if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
 	{
 		BITBANG_PDIDATA_DDR  &= ~BITBANG_PDIDATA_MASK;
 		BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
+
+		/* Wait until DATA line has been pulled up to idle by the target */
+		while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining)
+		{
+			/* Manage software timeout */
+			if (TIFR0 & (1 << OCF0A))
+			{
+				TIFR0 |= (1 << OCF0A);
+				TimeoutMSRemaining--;
+			}
+		}
 	}
 	else
 	{
 		BITBANG_TPIDATA_DDR  &= ~BITBANG_TPIDATA_MASK;
-		BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;	
-	}
-	
-	/* Wait until DATA line has been pulled up to idle by the target */
-	while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining)
-	{
-		/* Manage software timeout */
-		if (TIFR0 & (1 << OCF0A))
+		BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
+
+		/* Wait until DATA line has been pulled up to idle by the target */
+		while (!(BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK) && TimeoutMSRemaining)
 		{
-			TIFR0 |= (1 << OCF0A);
-			TimeoutMSRemaining--;
-		}
+			/* Manage software timeout */
+			if (TIFR0 & (1 << OCF0A))
+			{
+				TIFR0 |= (1 << OCF0A);
+				TimeoutMSRemaining--;
+			}
+		}	
 	}	
 #endif