X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/a5adbae652bcf5382ef34d71da4d11de15b482a6..7a9b3d3641e1bc97d2826b4865b3cedb11099e62:/Projects/AVRISP/AVRISP.txt

diff --git a/Projects/AVRISP/AVRISP.txt b/Projects/AVRISP/AVRISP.txt
index c533af725..c15c27fa6 100644
--- a/Projects/AVRISP/AVRISP.txt
+++ b/Projects/AVRISP/AVRISP.txt
@@ -54,14 +54,18 @@
  *  drivers. When promted, direct your OS to install Atmel's AVRISP-MKII drivers provided with AVRStudio.
  *
  *  Note that this design currently has several limitations:
- *    - Minimum target clock speed of 500KHz due to hardware SPI used
+ *    - Minimum ISP target clock speed of 500KHz due to hardware SPI used
  *    - No reversed/shorted target connector detection and notification
  *
- *  On AVR models with an ADC converter, ACC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be
+ *  On AVR models with an ADC converter, AVCC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be
  *  set to an appropriate ADC channel number in the project makefile for VTARGET detection to operate correctly. On models
  *  without an ADC converter, VTARGET will report at a fixed 5V level.
  *
- *  Connections to the device are simple for SPI programming:
+ *  When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the
+ *  XPLAIN's XMEGA AVR, and will enable only PDI programming support.
+ *
+ *
+ *  Connections to the device for SPI programming (when enabled):
  *
  *  <table>
  *   <tr>
@@ -105,13 +109,13 @@
  *  <b><sup>2</sup></b> <i>See \ref SSec_Options section</i>
  *
  *
- *  Connections to the device are simple for SPI programming:
+ *  Connections to the device for PDI programming (when enabled):
  *
  *  <table>
  *   <tr>
  *    <td><b>Programmer Pin:</b></td>
  *    <td><b>Target Device Pin:</b></td>
- *    <td><b>ISP 6 Pin Layout:</b></td>
+ *    <td><b>PDI 6 Pin Layout:</b></td>
  *   </tr>
  *   <tr>
  *    <td>MISO</td>
@@ -158,19 +162,20 @@
  *   <tr>
  *    <td>RESET_LINE_PORT</td>
  *    <td>Makefile CDEFS</td>
- *    <td>PORT register for the programmer's target RESET line.</td>
+ *    <td>PORT register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>
  *   </tr>
  *   <tr>
  *    <td>RESET_LINE_DDR</td>
  *    <td>Makefile CDEFS</td>
- *    <td>DDR register for the programmer's target RESET line.</td>
+ *    <td>DDR register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>
  *   </tr>
  *   <tr>
  *    <td>RESET_LINE_MASK</td>
  *    <td>Makefile CDEFS</td>
  *    <td>Mask for the programmer's target RESET line on the chosen port. <b>Must not be the AVR's /SS pin</b>, as the
  *        target pins are tri-stated when not in use, and low signals on the /SS pin will force SPI slave mode when the
- *        pin is configured as an input. When in PDI programming mode, this is the target clock pin.</td>
+ *        pin is configured as an input. When in PDI programming mode, this is the target clock pin.
+ *        <i>Ignored when compiled for the XPLAIN board.</i></td>
  *   </tr>
  *   <tr>
  *    <td>VTARGET_ADC_CHANNEL</td>
@@ -178,14 +183,14 @@
  *    <td>ADC channel number (on supported AVRs) to use for VTARGET level detection.</td> 
  *   </tr>
  *   <tr>
- *    <td>ENABLE_SPI_PROTOCOL</td>
+ *    <td>ENABLE_ISP_PROTOCOL</td>
  *    <td>Makefile CDEFS</td>
- *    <td>Define to enable SPI programming protocol support.</td>  
+ *    <td>Define to enable SPI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>  
  *   </tr>
  *   <tr>
- *    <td>ENABLE_XPROG_PROTOCOL</td>
+ *    <td>ENABLE_PDI_PROTOCOL</td>
  *    <td>Makefile CDEFS</td>
- *    <td>Define to enable XMEGA PDI programming protocol support.</td>  
+ *    <td>Define to enable XMEGA PDI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>  
  *   </tr>
  *  </table>
  */