X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/a5adbae652bcf5382ef34d71da4d11de15b482a6..24f730fce3f2022762011d795c3feada5ef874b3:/Projects/AVRISP/AVRISP.txt?ds=sidebyside diff --git a/Projects/AVRISP/AVRISP.txt b/Projects/AVRISP/AVRISP.txt index c533af725..35cf93770 100644 --- a/Projects/AVRISP/AVRISP.txt +++ b/Projects/AVRISP/AVRISP.txt @@ -6,18 +6,18 @@ /** \mainpage AVRISP MKII Programmer Project * - * \section SSec_Compat Demo Compatibility: + * \section SSec_Compat Project Compatibility: * - * The following list indicates what microcontrollers are compatible with this demo. + * The following list indicates what microcontrollers are compatible with this project. * * - Series 7 USB AVRs * - Series 6 USB AVRs * - Series 4 USB AVRs - * - Series 2 USB AVRs + * - Series 2 USB AVRs (8KB versions with reduced features only) * * \section SSec_Info USB Information: * - * The following table gives a rundown of the USB utilization of this demo. + * The following table gives a rundown of the USB utilization of this project. * * * @@ -51,17 +51,24 @@ * level conversion can be made to allow for the programming of 3.3V AVR designs. * * This device spoofs Atmel's official AVRISP-MKII device PID so that it remains compatible with Atmel's AVRISP-MKII - * drivers. When promted, direct your OS to install Atmel's AVRISP-MKII drivers provided with AVRStudio. + * drivers. When prompted, direct your OS to install Atmel's AVRISP-MKII drivers provided with AVRStudio. * * Note that this design currently has several limitations: - * - Minimum target clock speed of 500KHz due to hardware SPI used + * - Minimum ISP target clock speed of 500KHz due to hardware SPI used * - No reversed/shorted target connector detection and notification * - * On AVR models with an ADC converter, ACC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be + * On AVR models with an ADC converter, AVCC should be tied to 5V (e.g. VBUS) and the VTARGET_ADC_CHANNEL token should be * set to an appropriate ADC channel number in the project makefile for VTARGET detection to operate correctly. On models * without an ADC converter, VTARGET will report at a fixed 5V level. * - * Connections to the device are simple for SPI programming: + * When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the + * XPLAIN's XMEGA AVR, and will enable PDI only programming support (since ISP mode is not needed). + * + * While this application can be compiled for USB AVRs with as little as 8KB of FLASH, for full functionality 16KB or more + * of FLASH is required. On 8KB devices, either ISP or PDI programming support can be disabled to reduce program size. + * + * \section Sec_ISP ISP Connections + * Connections to the device for SPI programming (when enabled): * *
* @@ -104,14 +111,14 @@ * 1Optional, see \ref SSec_Options section - for USB AVRs with ADC modules only \n * 2See \ref SSec_Options section * - * - * Connections to the device are simple for SPI programming: + * \section Sec_PDI PDI Connections + * Connections to the device for PDI programming1 (when enabled): * *
* * * - * + * * * * @@ -145,9 +152,12 @@ * *
Programmer Pin:Target Device Pin:ISP 6 Pin Layout:PDI 6 Pin Layout:
MISO
* + * 1 When PDI_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together + * via a pair of 300 ohm resistors, and the AVR's XCK pin becomes CLOCK. + * * \section SSec_Options Project Options * - * The following defines can be found in this demo, which can control the demo behaviour when defined, or changed in value. + * The following defines can be found in this project, which can control the project behaviour when defined, or changed in value. * * * @@ -158,19 +168,25 @@ * * * - * + * + * + * + * + * + * * * * * - * + * * * * * * + * pin is configured as an input. When in PDI programming mode, this is the target clock pin. + * Ignored when compiled for the XPLAIN board. * * * @@ -178,14 +194,22 @@ * * * - * + * + * + * + * + * + * * - * + * * * - * + * * - * + * * *
RESET_LINE_PORTMakefile CDEFSPORT register for the programmer's target RESET line.PORT register for the programmer's target RESET line. Ignored when compiled for the XPLAIN board.
RESET_LINE_PINMakefile CDEFSPIN register for the programmer's target RESET line. Ignored when compiled for the XPLAIN board.
RESET_LINE_DDRMakefile CDEFSDDR register for the programmer's target RESET line.DDR register for the programmer's target RESET line. Ignored when compiled for the XPLAIN board.
RESET_LINE_MASKMakefile CDEFSMask for the programmer's target RESET line on the chosen port. Must not be the AVR's /SS pin, as the * target pins are tri-stated when not in use, and low signals on the /SS pin will force SPI slave mode when the - * pin is configured as an input. When in PDI programming mode, this is the target clock pin.
VTARGET_ADC_CHANNELADC channel number (on supported AVRs) to use for VTARGET level detection.
ENABLE_SPI_PROTOCOLENABLE_ISP_PROTOCOLMakefile CDEFSDefine to enable SPI programming protocol support. Ignored when compiled for the XPLAIN board.
ENABLE_PDI_PROTOCOLMakefile CDEFSDefine to enable SPI programming protocol support.Define to enable XMEGA PDI programming protocol support. Ignored when compiled for the XPLAIN board.
ENABLE_XPROG_PROTOCOLPDI_VIA_HARDWARE_USARTMakefile CDEFSDefine to enable XMEGA PDI programming protocol support.Define to force the PDI protocol (when enabled) to use the much faster hardware USART instead of bit-banging to + * match the official AVRISP pinout. This breaks pinout compatibility with the official AVRISP MKII (and requires + * seperate ISP and PDI programming headers) but increases programming speed dramatically. + * Ignored when compiled for the XPLAIN board.
*/