X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/8f7437dda24ee9d08eff4c33998aeea2028c197e..3642ea0b9715cdf0196b10c9fc97898940eaefa6:/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c?ds=sidebyside diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c index ae292a0d4..01617ac0f 100644 --- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c +++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c @@ -1,13 +1,13 @@ /* LUFA Library - Copyright (C) Dean Camera, 2010. + Copyright (C) Dean Camera, 2015. dean [at] fourwalledcubicle [dot] com www.lufa-lib.org */ /* - Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com) + Copyright 2015 Dean Camera (dean [at] fourwalledcubicle [dot] com) Permission to use, copy, modify, distribute, and sell this software and its documentation for any purpose is hereby granted @@ -18,7 +18,7 @@ advertising or publicity pertaining to distribution of the software without specific, written prior permission. - The author disclaim all warranties with regard to this + The author disclaims all warranties with regard to this software, including all implied warranties of merchantability and fitness. In no event shall the author be liable for any special, indirect or consequential damages or any damages @@ -52,7 +52,7 @@ void XPROGTarget_EnableTargetPDI(void) /* Set DATA line high for at least 90ns to disable /RESET functionality */ PORTD |= (1 << 3); - _delay_us(1); + _delay_us(100); /* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */ UBRR1 = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1); @@ -72,13 +72,13 @@ void XPROGTarget_EnableTargetTPI(void) /* Set /RESET line low for at least 400ns to enable TPI functionality */ AUX_LINE_DDR |= AUX_LINE_MASK; AUX_LINE_PORT &= ~AUX_LINE_MASK; - _delay_us(1); + _delay_us(100); /* Set Tx and XCK as outputs, Rx as input */ DDRD |= (1 << 5) | (1 << 3); DDRD &= ~(1 << 2); - /* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */ + /* Set up the synchronous USART for TPI communications - 8 data bits, even parity, 2 stop bits */ UBRR1 = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1); UCSR1B = (1 << TXEN1); UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1); @@ -92,7 +92,8 @@ void XPROGTarget_EnableTargetTPI(void) void XPROGTarget_DisableTargetPDI(void) { /* Switch to Rx mode to ensure that all pending transmissions are complete */ - XPROGTarget_SetRxMode(); + if (IsSending) + XPROGTarget_SetRxMode(); /* Turn off receiver and transmitter of the USART, clear settings */ UCSR1A = ((1 << TXC1) | (1 << RXC1)); @@ -108,7 +109,8 @@ void XPROGTarget_DisableTargetPDI(void) void XPROGTarget_DisableTargetTPI(void) { /* Switch to Rx mode to ensure that all pending transmissions are complete */ - XPROGTarget_SetRxMode(); + if (IsSending) + XPROGTarget_SetRxMode(); /* Turn off receiver and transmitter of the USART, clear settings */ UCSR1A |= (1 << TXC1) | (1 << RXC1); @@ -118,7 +120,7 @@ void XPROGTarget_DisableTargetTPI(void) /* Set all USART lines as inputs, tristate */ DDRD &= ~((1 << 5) | (1 << 3)); PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2)); - + /* Tristate target /RESET line */ AUX_LINE_DDR &= ~AUX_LINE_MASK; AUX_LINE_PORT &= ~AUX_LINE_MASK; @@ -140,7 +142,7 @@ void XPROGTarget_SendByte(const uint8_t Byte) UDR1 = Byte; } -/** Receives a byte via the software USART, blocking until data is received. +/** Receives a byte via the hardware USART, blocking until data is received or timeout expired. * * \return Received byte from the USART */ @@ -162,13 +164,14 @@ void XPROGTarget_SendIdle(void) /* Switch to Tx mode if currently in Rx mode */ if (!(IsSending)) XPROGTarget_SetTxMode(); - + /* Need to do nothing for a full frame to send an IDLE */ for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++) { /* Wait for a full cycle of the clock */ while (PIND & (1 << 5)); while (!(PIND & (1 << 5))); + while (PIND & (1 << 5)); } } @@ -177,6 +180,7 @@ static void XPROGTarget_SetTxMode(void) /* Wait for a full cycle of the clock */ while (PIND & (1 << 5)); while (!(PIND & (1 << 5))); + while (PIND & (1 << 5)); PORTD |= (1 << 3); DDRD |= (1 << 3);