X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/8a55d80e7e1214b8625b413fa0123a8b6ce9c825..48e50b6b578fa7a74b4f33f067aa684e3469850e:/Projects/AVRISP/Lib/NVMTarget.c?ds=inline

diff --git a/Projects/AVRISP/Lib/NVMTarget.c b/Projects/AVRISP/Lib/NVMTarget.c
index fee432cfb..a23ccf292 100644
--- a/Projects/AVRISP/Lib/NVMTarget.c
+++ b/Projects/AVRISP/Lib/NVMTarget.c
@@ -137,4 +137,31 @@ void NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
 	}
 }
 
+void NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)
+{
+	NVMTarget_WaitWhileNVMControllerBusy();
+
+	PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+	NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
+	PDITarget_SendByte(EraseCommand);
+	
+	if (EraseCommand == NVM_CMD_CHIPERASE)
+	{
+		/* Set CMDEX bit in NVM CTRLA register to start the chip erase */
+		PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+		NVMTarget_SendNVMRegAddress(NVM_REG_CTRLA);
+		PDITarget_SendByte(1 << 0);		
+	}
+	else
+	{
+		/* Other erase modes just need us to address a byte within the target memory space */
+		PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+		NVMTarget_SendAddress(Address);	
+		PDITarget_SendByte(0x00);
+	}
+	
+	NVMTarget_WaitWhileNVMBusBusy();
+	NVMTarget_WaitWhileNVMControllerBusy();
+}
+
 #endif