X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/5e12d436fa31399ba6b5c8cab484d4a7b5adf7e7..c58c53dba90fdc19d38f5e5d6957f2ede2a740f3:/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c?ds=inline

diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
index 85a750454..bfc2e824d 100644
--- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
+++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
@@ -53,12 +53,13 @@ volatile uint16_t           SoftUSART_Data;
 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 {
 	/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
-	BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;
+	BITBANG_PDICLOCK_PIN = BITBANG_PDICLOCK_MASK;
 
 	/* If not sending or receiving, just exit */
 	if (!(SoftUSART_BitCount))
 	  return;
 
+	/* Check to see if we are at a rising or falling edge of the clock */
 	if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)
 	{
 		/* If at rising clock edge and we are in send mode, abort */
@@ -79,10 +80,6 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 	}
 	else
 	{
-		/* If not sending or receiving, just exit */
-		if (!(SoftUSART_BitCount))
-		  return;
-
 		/* If at falling clock edge and we are in receive mode, abort */
 		if (!IsSending)
 		  return;
@@ -102,7 +99,7 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 ISR(TIMER1_CAPT_vect, ISR_BLOCK)
 {
 	/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
-	BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;
+	BITBANG_TPICLOCK_PIN = BITBANG_TPICLOCK_MASK;
 
 	/* If not sending or receiving, just exit */
 	if (!(SoftUSART_BitCount))
@@ -161,7 +158,7 @@ void XPROGTarget_EnableTargetPDI(void)
 	
 	/* Set up the synchronous USART for XMEGA communications - 
 	   8 data bits, even parity, 2 stop bits */
-	UBRR1  = (F_CPU / 500000UL);
+	UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);
 	UCSR1B = (1 << TXEN1);
 	UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 #else
@@ -202,7 +199,7 @@ void XPROGTarget_EnableTargetTPI(void)
 		
 	/* Set up the synchronous USART for TINY communications - 
 	   8 data bits, even parity, 2 stop bits */
-	UBRR1  = (F_CPU / 500000UL);
+	UBRR1  = (F_CPU / XPROG_HARDWARE_SPEED);
 	UCSR1B = (1 << TXEN1);
 	UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 #else
@@ -231,26 +228,18 @@ void XPROGTarget_DisableTargetPDI(void)
 	XPROGTarget_SetRxMode();
 
 #if defined(XPROG_VIA_HARDWARE_USART)
-	/* Set /RESET high for a one millisecond to ensure target device is restarted */
-	PORTD |= (1 << 5);
-	_delay_ms(1);
-
 	/* Turn off receiver and transmitter of the USART, clear settings */
-	UCSR1A |= (1 << TXC1) | (1 << RXC1);
+	UCSR1A  = ((1 << TXC1) | (1 << RXC1));
 	UCSR1B  = 0;
 	UCSR1C  = 0;
 
-	/* Set all USART lines as input, tristate */
+	/* Tristate all pins */
 	DDRD  &= ~((1 << 5) | (1 << 3));
 	PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
 #else
 	/* Turn off software USART management timer */
 	TCCR1B = 0;
 
-	/* Set /RESET high for a one millisecond to ensure target device is restarted */
-	BITBANG_PDICLOCK_PORT |= BITBANG_PDICLOCK_MASK;
-	_delay_ms(1);
-
 	/* Set DATA and CLOCK lines to inputs */
 	BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;
 	BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;