X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/2f6c096050ee0057ccbff0ee87d58f72fae75748..24f730fce3f2022762011d795c3feada5ef874b3:/Projects/AVRISP/Lib/NVMTarget.c

diff --git a/Projects/AVRISP/Lib/NVMTarget.c b/Projects/AVRISP/Lib/NVMTarget.c
index 9402b2b8a..adf213bb4 100644
--- a/Projects/AVRISP/Lib/NVMTarget.c
+++ b/Projects/AVRISP/Lib/NVMTarget.c
@@ -42,23 +42,20 @@
  *
  *  \param[in] Register  NVM register whose absolute address is to be sent
  */
-void NVMTarget_SendNVMRegAddress(uint8_t Register)
+void NVMTarget_SendNVMRegAddress(const uint8_t Register)
 {
 	/* Determine the absolute register address from the NVM base memory address and the NVM register address */
 	uint32_t Address = XPROG_Param_NVMBase | Register;
 
 	/* Send the calculated 32-bit address to the target, LSB first */
-	PDITarget_SendByte(Address &  0xFF);
-	PDITarget_SendByte(Address >> 8);
-	PDITarget_SendByte(Address >> 16);
-	PDITarget_SendByte(Address >> 24);
+	NVMTarget_SendAddress(Address);
 }
 
 /** Sends the given 32-bit absolute address to the target.
  *
  *  \param[in] AbsoluteAddress  Absolute address to send to the target
  */
-void NVMTarget_SendAddress(uint32_t AbsoluteAddress)
+void NVMTarget_SendAddress(const uint32_t AbsoluteAddress)
 {
 	/* Send the given 32-bit address to the target, LSB first */
 	PDITarget_SendByte(AbsoluteAddress &  0xFF);
@@ -75,9 +72,12 @@ void NVMTarget_SendAddress(uint32_t AbsoluteAddress)
 bool NVMTarget_WaitWhileNVMControllerBusy(void)
 {
 	TCNT0 = 0;
-
+	TIFR0 = (1 << OCF1A);
+			
+	uint8_t TimeoutMS = PDI_NVM_TIMEOUT_MS;
+	
 	/* Poll the NVM STATUS register while the NVM controller is busy */
-	while (TCNT0 < NVM_BUSY_TIMEOUT_MS)
+	while (TimeoutMS)
 	{
 		/* Send a LDS command to read the NVM STATUS register to check the BUSY flag */
 		PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
@@ -86,6 +86,12 @@ bool NVMTarget_WaitWhileNVMControllerBusy(void)
 		/* Check to see if the BUSY flag is still set */
 		if (!(PDITarget_ReceiveByte() & (1 << 7)))
 		  return true;
+
+		if (TIFR0 & (1 << OCF1A))
+		{
+			TIFR0 = (1 << OCF1A);
+			TimeoutMS--;
+		}
 	}
 	
 	return false;
@@ -98,7 +104,7 @@ bool NVMTarget_WaitWhileNVMControllerBusy(void)
  *
  *  \return Boolean true if the command sequence complete successfully
  */
-bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest)
+bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
 {
 	/* Wait until the NVM controller is no longer busy */
 	if (!(NVMTarget_WaitWhileNVMControllerBusy()))
@@ -150,7 +156,7 @@ bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest)
  *
  *  \return Boolean true if the command sequence complete successfully
  */
-bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
+bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)
 {
 	/* Wait until the NVM controller is no longer busy */
 	if (!(NVMTarget_WaitWhileNVMControllerBusy()))
@@ -182,11 +188,10 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
  *  \param[in]  WriteCommand  Command to send to the device to write each memory byte
  *  \param[in]  WriteAddress  Start address to write to within the target's address space
  *  \param[in]  WriteBuffer   Buffer to source data from
- *  \param[in]  WriteSize     Number of bytes to write
  *
  *  \return Boolean true if the command sequence complete successfully
  */
-bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer)
+bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)
 {
 	/* Wait until the NVM controller is no longer busy */
 	if (!(NVMTarget_WaitWhileNVMControllerBusy()))
@@ -199,7 +204,7 @@ bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint
 	
 	/* Send new memory byte to the memory to the target */
 	PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
-	NVMTarget_SendAddress(WriteAddress++);
+	NVMTarget_SendAddress(WriteAddress);
 	PDITarget_SendByte(*(WriteBuffer++));
 	
 	return true;
@@ -217,8 +222,9 @@ bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint
  *
  *  \return Boolean true if the command sequence complete successfully
  */
-bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffCommand, uint8_t WritePageCommand,
-                               uint8_t PageMode, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)
+bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,
+                               const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,
+                               const uint8_t* WriteBuffer, const uint16_t WriteSize)
 {
 	if (PageMode & XPRG_PAGEMODE_ERASE)
 	{
@@ -289,7 +295,7 @@ bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffComman
  *
  *  \return Boolean true if the command sequence complete successfully
  */
-bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)
+bool NVMTarget_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)
 {
 	/* Wait until the NVM controller is no longer busy */
 	if (!(NVMTarget_WaitWhileNVMControllerBusy()))