X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/1aeb5056d6943331ee2d11807bcc0a6480ad1ca0..ec6fbb219fc95ffd5f6f9fffd84eeb5f3fd643a3:/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c

diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
index 140642869..e77d77bd5 100644
--- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
+++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
@@ -96,7 +96,7 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 }
 
 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
-ISR(TIMER1_COMPB_vect, ISR_BLOCK)
+ISR(TIMER1_CAPT_vect, ISR_BLOCK)
 {
 	/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
 	BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;
@@ -154,7 +154,7 @@ void XPROGTarget_EnableTargetPDI(void)
 	
 	/* Set DATA line high for at least 90ns to disable /RESET functionality */
 	PORTD |= (1 << 3);
-	_delay_ms(1);
+	_delay_us(1);
 	
 	/* Set up the synchronous USART for XMEGA communications - 
 	   8 data bits, even parity, 2 stop bits */
@@ -168,7 +168,7 @@ void XPROGTarget_EnableTargetPDI(void)
 	
 	/* Set DATA line high for at least 90ns to disable /RESET functionality */
 	BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
-	_delay_ms(1);
+	_delay_us(1);
 
 	/* Fire timer compare channel A ISR to manage the software USART */
 	OCR1A   = BITS_BETWEEN_USART_CLOCKS;
@@ -189,7 +189,7 @@ void XPROGTarget_EnableTargetTPI(void)
 	/* Set /RESET line low for at least 400ns to enable TPI functionality */
 	AUX_LINE_DDR  |=  AUX_LINE_MASK;
 	AUX_LINE_PORT &= ~AUX_LINE_MASK;
-	_delay_ms(1);
+	_delay_us(1);
 
 #if defined(XPROG_VIA_HARDWARE_USART)
 	/* Set Tx and XCK as outputs, Rx as input */
@@ -209,10 +209,10 @@ void XPROGTarget_EnableTargetTPI(void)
 	/* Set DATA line high for idle state */
 	BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
 
-	/* Fire timer capture channel B ISR to manage the software USART */
-	OCR1B   = BITS_BETWEEN_USART_CLOCKS;
-	TCCR1B  = (1 << WGM12) | (1 << CS10);
-	TIMSK1  = (1 << OCIE1B);
+	/* Fire timer capture channel ISR to manage the software USART */
+	ICR1    = BITS_BETWEEN_USART_CLOCKS;
+	TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
+	TIMSK1  = (1 << ICIE1);
 #endif
 
 	/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */