X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/0ce2950d811b8dc11e46602e7490d795d8ddfb5d..ec537fd84d6ad3fd0dfa1b55efa2c2d554c1db48:/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c?ds=sidebyside

diff --git a/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c b/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c
index f4e9e3d3a..811e777cc 100644
--- a/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c
+++ b/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c
@@ -117,6 +117,7 @@ volatile uint8_t SoftSPI_BitsRemaining;
 /** ISR to handle software SPI transmission and reception */
 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 {
+	/* Check if rising edge (output next bit) or falling edge (read in next bit) */
 	if (!(PINB & (1 << 1)))
 	{
 		if (SoftSPI_Data & (1 << 7))
@@ -142,7 +143,7 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 /** Initialises the appropriate SPI driver (hardware or software, depending on the selected ISP speed) ready for
  *  communication with the attached target.
  */
-void ISPTarget_Init(void)
+void ISPTarget_EnableTargetISP(void)
 {
 	uint8_t SCKDuration = V2Params_GetParameterValue(PARAM_SCK_DURATION);
 
@@ -167,7 +168,7 @@ void ISPTarget_Init(void)
 /** Shuts down the current selected SPI driver (hardware or software, depending on the selected ISP speed) so that no
  *  further communications can occur until the driver is re-initialized.
  */
-void ISPTarget_ShutDown(void)
+void ISPTarget_DisableTargetISP(void)
 {
 	if (HardwareSPIMode)
 	{
@@ -178,6 +179,8 @@ void ISPTarget_ShutDown(void)
 		DDRB  &= ~((1 << 1) | (1 << 2));
 		PORTB &= ~((1 << 0) | (1 << 3));
 		
+		/* Must re-enable rescue clock once software ISP has exited, as the timer for the rescue clock is
+		 * re-purposed for software SPI */
 		ISPTarget_ConfigureRescueClock();
 	}
 }
@@ -189,19 +192,29 @@ void ISPTarget_ShutDown(void)
  */
 void ISPTarget_ConfigureRescueClock(void)
 {
-	/* Configure OCR1A as an output for the specified AVR model */
-	#if defined(USB_SERIES_2_AVR)
-	DDRC |= (1 << 6);
+	#if defined(XCK_RESCUE_CLOCK_ENABLE)
+		/* Configure XCK as an output for the specified AVR model */
+		DDRD  |= (1 << 5);
+		
+		/* Start USART to generate a 4MHz clock on the XCK pin */
+		UBRR1  = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
+		UCSR1B = (1 << TXEN1);
+		UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
 	#else
-	DDRB |= (1 << 5);
+		/* Configure OCR1A as an output for the specified AVR model */
+		#if defined(USB_SERIES_2_AVR)
+		DDRC |= (1 << 6);
+		#else
+		DDRB |= (1 << 5);
+		#endif
+
+		/* Start Timer 1 to generate a 4MHz clock on the OCR1A pin */
+		TIMSK1 = 0;
+		TCNT1  = 0;
+		OCR1A  = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
+		TCCR1A = (1 << COM1A0);
+		TCCR1B = ((1 << WGM12) | (1 << CS10));
 	#endif
-
-	/* Start Timer 1 to generate a 4MHz clock on the OCR1A pin */
-	TIMSK1 = 0;
-	TCNT1  = 0;
-	OCR1A  = ((F_CPU / 2 / 4000000UL) - 1);
-	TCCR1A = (1 << COM1A0);
-	TCCR1B = ((1 << WGM12) | (1 << CS10));
 }
 
 /** Configures the AVR's timer ready to produce software ISP for the slower ISP speeds that