X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/036a156ff4518212ee1db487ce644deeca91bb71..55d7e1e65bccd6b4c44802cf971f39eb05e6e57a:/Projects/XPLAINBridge/Lib/SoftUART.c?ds=sidebyside

diff --git a/Projects/XPLAINBridge/Lib/SoftUART.c b/Projects/XPLAINBridge/Lib/SoftUART.c
index 81f023740..02223af98 100644
--- a/Projects/XPLAINBridge/Lib/SoftUART.c
+++ b/Projects/XPLAINBridge/Lib/SoftUART.c
@@ -54,12 +54,12 @@ static uint8_t RX_Data;
 /** Initializes the software UART, ready for data transmission and reception into the global ring buffers. */
 void SoftUART_Init(void)
 {
-	/* Set TX pin to output high, enable RX pullup */
+	/* Set TX pin to output high, enable RX pull-up */
 	STXPORT |= (1 << STX);
 	STXDDR  |= (1 << STX);
 	SRXPORT |= (1 << SRX);
 
-	/* Enable INT0 for the detection of incomming start bits that signal the start of a byte */
+	/* Enable INT0 for the detection of incoming start bits that signal the start of a byte */
 	EICRA  = (1 << ISC01);
 	EIMSK  = (1 << INT0);
 
@@ -79,18 +79,12 @@ ISR(INT0_vect, ISR_BLOCK)
 	RX_Data    = 0;
 	RX_BitMask = (1 << 0);
 
-	/* Check that the start bit is still low to prevent noise from triggering a reception */
-	if (!(SRXPIN & (1 << SRX)))
-	{
-		/* Clear reception channel ISR flag in case it is pending */
-		TIFR1 = (1 << OCF1A);
-
-		/* Still low, enable bit receive ISR */
-		TIMSK1 =  (1 << OCIE1A);		
+	/* Clear reception channel ISR flag and enable the bit reception ISR */
+	TIFR1  = (1 << OCF1A);
+	TIMSK1 = (1 << OCIE1A);		
 
-		/* Clear the start bit detection ISR flag */
-		EIMSK &= ~(1 << INT0);
-	}
+	/* Disable start bit detection ISR while the next byte is received */
+	EIMSK &= ~(1 << INT0);
 }
 
 /** ISR to manage the reception of bits to the software UART. */