X-Git-Url: http://git.linex4red.de/pub/USBasp.git/blobdiff_plain/0304916356ea83bb17783df157c79cbfdef0d45b..9f0cd5ebb83747444c33df1c35e7e44d01676ff3:/LUFA/Platform/XMEGA/ClockManagement.h diff --git a/LUFA/Platform/XMEGA/ClockManagement.h b/LUFA/Platform/XMEGA/ClockManagement.h index 1305d0e4b..c824c89fb 100644 --- a/LUFA/Platform/XMEGA/ClockManagement.h +++ b/LUFA/Platform/XMEGA/ClockManagement.h @@ -1,13 +1,13 @@ /* LUFA Library - Copyright (C) Dean Camera, 2011. + Copyright (C) Dean Camera, 2012. dean [at] fourwalledcubicle [dot] com www.lufa-lib.org */ /* - Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com) + Copyright 2012 Dean Camera (dean [at] fourwalledcubicle [dot] com) Permission to use, copy, modify, distribute, and sell this software and its documentation for any purpose is hereby granted @@ -35,8 +35,8 @@ * of the various clocks within the device to clock the various peripherals. */ -/** \ingroup Group_PlatformDrivers - * \defgroup Group_PlatformDrivers_XMEGAClocks AVR USB XMEGA Clock Management Driver - LUFA/Platform/XMEGA/ClockManagement.h +/** \ingroup Group_PlatformDrivers_XMEGA + * \defgroup Group_PlatformDrivers_XMEGAClocks Clock Management Driver - LUFA/Platform/XMEGA/ClockManagement.h * \brief Module Clock Driver for the AVR USB XMEGA microcontrollers. * * \section Sec_Dependencies Module Source Dependencies @@ -50,16 +50,16 @@ * Usage Example: * \code * #include - * + * * void main(void) * { - * // Start the PLL to multiply the 2MHz RC oscillator to 32MHz and switch the CPU core to run from it - * XMEGACLK_StartPLL(CLOCK_SRC_INT_RC2MHZ, 2000000, 32000000); - * XMEGACLK_SetCPUClockSource(CLOCK_SRC_PLL, F_CPU); - * - * // Start the 32MHz internal RC oscillator and start the DFLL to increase it to 48MHz using the USB SOF as a reference + * // Start the PLL to multiply the 2MHz RC oscillator to F_CPU and switch the CPU core to run from it + * XMEGACLK_StartPLL(CLOCK_SRC_INT_RC2MHZ, 2000000, F_CPU); + * XMEGACLK_SetCPUClockSource(CLOCK_SRC_PLL); + * + * // Start the 32MHz internal RC oscillator and start the DFLL to increase it to F_USB using the USB SOF as a reference * XMEGACLK_StartInternalOscillator(CLOCK_SRC_INT_RC32MHZ); - * XMEGACLK_StartDFLL(CLOCK_SRC_INT_RC32MHZ, DFLL_REF_INT_USBSOF, 48000000); + * XMEGACLK_StartDFLL(CLOCK_SRC_INT_RC32MHZ, DFLL_REF_INT_USBSOF, F_USB); * } * \endcode * @@ -70,7 +70,7 @@ #define _XMEGA_CLOCK_MANAGEMENT_H_ /* Includes: */ - #include + #include "../../Common/Common.h" /* Enable C linkage for C++ Compilers: */ #if defined(__cplusplus) @@ -85,10 +85,10 @@ EXOSC_FREQ_2MHZ_MAX = OSC_FRQRANGE_04TO2_gc, /**< External crystal oscillator equal to or slower than 2MHz. */ EXOSC_FREQ_9MHZ_MAX = OSC_FRQRANGE_2TO9_gc, /**< External crystal oscillator equal to or slower than 9MHz. */ EXOSC_FREQ_12MHZ_MAX = OSC_FRQRANGE_9TO12_gc, /**< External crystal oscillator equal to or slower than 12MHz. */ - EXOSC_FREQ_16MHZ_MAX = OSC_FRQRANGE_12TO16_gc, /**< External crystal oscillator equal to or slower than 16MHz. */ + EXOSC_FREQ_16MHZ_MAX = OSC_FRQRANGE_12TO16_gc, /**< External crystal oscillator equal to or slower than 16MHz. */ }; - /** Enum for the possible external oscillator statup times. */ + /** Enum for the possible external oscillator startup times. */ enum XMEGA_Extern_OSC_ClockStartup_t { EXOSC_START_6CLK = OSC_XOSCSEL_EXTCLK_gc, /**< Wait 6 clock cycles before startup (external clock). */ @@ -97,7 +97,7 @@ EXOSC_START_1KCLK = OSC_XOSCSEL_XTAL_1KCLK_gc, /**< Wait 1K clock cycles before startup. */ EXOSC_START_16KCLK = OSC_XOSCSEL_XTAL_16KCLK_gc, /**< Wait 16K clock cycles before startup. */ }; - + /** Enum for the possible module clock sources. */ enum XMEGA_System_ClockSource_t { @@ -117,11 +117,31 @@ }; /* Inline Functions: */ + /** Write a value to a location protected by the XMEGA CCP protection mechanism. This function uses inline assembly to ensure that + * the protected address is written to within four clock cycles of the CCP key being written. + * + * \param[in] Address Address to write to, a memory address protected by the CCP mechanism + * \param[in] Value Value to write to the protected location + */ + static inline void XMEGACLK_CCP_Write(volatile void* Address, const uint8_t Value) ATTR_ALWAYS_INLINE; + static inline void XMEGACLK_CCP_Write(volatile void* Address, const uint8_t Value) + { + __asm__ __volatile__ ( + "out %0, __zero_reg__" "\n\t" /* Zero RAMPZ using fixed zero value register */ + "movw r30, %1" "\n\t" /* Copy address to Z register pair */ + "out %2, %3" "\n\t" /* Write key to CCP register */ + "st Z, %4" "\n\t" /* Indirectly write value to address */ + : /* No output operands */ + : /* Input operands: */ "m" (RAMPZ), "e" (Address), "m" (CCP), "r" (CCP_IOREG_gc), "r" (Value) + : /* Clobbered registers: */ "r30", "r31" + ); + } + /** Starts the external oscillator of the XMEGA microcontroller, with the given options. This routine blocks until * the oscillator is ready for use. * * \param[in] FreqRange Frequency range of the external oscillator, a value from \ref XMEGA_Extern_OSC_ClockFrequency_t. - * \param[in] Startup Statup time of the external oscillator, a value from \ref XMEGA_Extern_OSC_ClockStartup_t. + * \param[in] Startup Startup time of the external oscillator, a value from \ref XMEGA_Extern_OSC_ClockStartup_t. * * \return Boolean \c true if the external oscillator was successfully started, \c false if invalid parameters specified. */ @@ -132,8 +152,8 @@ { OSC.XOSCCTRL = (FreqRange | ((Startup == EXOSC_START_32KCLK) ? OSC_X32KLPM_bm : 0) | Startup); OSC.CTRL |= OSC_XOSCEN_bm; - - while (!(OSC.STATUS & OSC_XOSCRDY_bm)); + + while (!(OSC.STATUS & OSC_XOSCRDY_bm)); return true; } @@ -162,14 +182,14 @@ return true; case CLOCK_SRC_INT_RC32MHZ: OSC.CTRL |= OSC_RC32MEN_bm; - while (!(OSC.STATUS & OSC_RC32MRDY_bm)); + while (!(OSC.STATUS & OSC_RC32MRDY_bm)); return true; case CLOCK_SRC_INT_RC32KHZ: OSC.CTRL |= OSC_RC32KEN_bm; - while (!(OSC.STATUS & OSC_RC32KRDY_bm)); + while (!(OSC.STATUS & OSC_RC32KRDY_bm)); return true; } - + return false; } @@ -178,7 +198,7 @@ * \param[in] Source Internal oscillator to stop, a value from \ref XMEGA_System_ClockSource_t. * * \return Boolean \c true if the internal oscillator was successfully stopped, \c false if invalid parameters specified. - */ + */ static inline bool XMEGACLK_StopInternalOscillator(const uint8_t Source) ATTR_ALWAYS_INLINE; static inline bool XMEGACLK_StopInternalOscillator(const uint8_t Source) { @@ -194,13 +214,13 @@ OSC.CTRL &= ~OSC_RC32KEN_bm; return true; } - + return false; } /** Starts the PLL of the XMEGA microcontroller, with the given options. This routine blocks until the PLL is ready for use. * - * \note The output frequency must be equal to or greater than the source frequency. + * \attention The output frequency must be equal to or greater than the source frequency. * * \param[in] Source Clock source for the PLL, a value from \ref XMEGA_System_ClockSource_t. * \param[in] SourceFreq Frequency of the PLL's clock source, in Hz. @@ -216,10 +236,13 @@ const uint32_t Frequency) { uint8_t MulFactor = (Frequency / SourceFreq); - + if (SourceFreq > Frequency) - return false; - + return false; + + if (MulFactor > 31) + return false; + switch (Source) { case CLOCK_SRC_INT_RC2MHZ: @@ -236,7 +259,7 @@ } OSC.CTRL |= OSC_PLLEN_bm; - + while (!(OSC.STATUS & OSC_PLLRDY_bm)); return true; } @@ -247,11 +270,11 @@ { OSC.CTRL &= ~OSC_PLLEN_bm; } - + /** Starts the DFLL of the XMEGA microcontroller, with the given options. * * \param[in] Source RC Clock source for the DFLL, a value from \ref XMEGA_System_ClockSource_t. - * \param[in] Reference Reference clock source for the DFLL, an value from \ref XMEGA_System_DFLLReference_t + * \param[in] Reference Reference clock source for the DFLL, an value from \ref XMEGA_System_DFLLReference_t. * \param[in] Frequency Target frequency of the DFLL's output. * * \return Boolean \c true if the DFLL was successfully started, \c false if invalid parameters specified. @@ -264,7 +287,7 @@ const uint32_t Frequency) { uint16_t DFLLCompare = (Frequency / 1000); - + switch (Source) { case CLOCK_SRC_INT_RC2MHZ: @@ -291,7 +314,7 @@ default: return false; } - + return true; } @@ -315,7 +338,7 @@ default: return false; } - + return true; } @@ -323,17 +346,14 @@ * and ready for use before this function is called. * * \param[in] Source Clock source for the CPU core, a value from \ref XMEGA_System_ClockSource_t. - * \param[in] SourceFreq Frequency of the CPU core's clock source, in Hz. * - * \return Boolean \c true if the CPU core clock was sucessfully altered, \c false if invalid parameters specified. + * \return Boolean \c true if the CPU core clock was successfully altered, \c false if invalid parameters specified. */ - static inline bool XMEGACLK_SetCPUClockSource(const uint8_t Source, - const uint32_t SourceFreq) ATTR_ALWAYS_INLINE; - static inline bool XMEGACLK_SetCPUClockSource(const uint8_t Source, - const uint32_t SourceFreq) + static inline bool XMEGACLK_SetCPUClockSource(const uint8_t Source) ATTR_ALWAYS_INLINE; + static inline bool XMEGACLK_SetCPUClockSource(const uint8_t Source) { uint8_t ClockSourceMask = 0; - + switch (Source) { case CLOCK_SRC_INT_RC2MHZ: @@ -354,16 +374,15 @@ default: return false; } - + uint_reg_t CurrentGlobalInt = GetGlobalInterruptMask(); GlobalInterruptDisable(); - CCP = CCP_IOREG_gc; - CLK_CTRL = ClockSourceMask; - + XMEGACLK_CCP_Write(&CLK.CTRL, ClockSourceMask); + SetGlobalInterruptMask(CurrentGlobalInt); - - Delay_MS(1); + + Delay_MS(1); return (CLK.CTRL == ClockSourceMask); } @@ -375,3 +394,4 @@ #endif /** @} */ +