Add Doxygen documentation to the completed portions of the PDI programming protocol...

[pub/USBasp.git] / Projects / AVRISP / Lib / NVMTarget.c

diff --git a/Projects/AVRISP/Lib/NVMTarget.c b/Projects/AVRISP/Lib/NVMTarget.c
index b57cf6d..85de130 100644 (file)
--- a/Projects/AVRISP/Lib/NVMTarget.c
+++ b/Projects/AVRISP/Lib/NVMTarget.c
@@ -38,6 +38,10 @@
 \r
 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
 \r
 \r
 #if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)\r
 \r

+/** Sends the given NVM register address to the target.\r
+ *\r
+ *  \param[in] Register  NVM register whose absolute address is to be sent\r
+ */\r

 void NVMTarget_SendNVMRegAddress(uint8_t Register)\r
 {\r
        /* Determine the absolute register address from the NVM base memory address and the NVM register address */\r
 void NVMTarget_SendNVMRegAddress(uint8_t Register)\r
 {\r
        /* Determine the absolute register address from the NVM base memory address and the NVM register address */\r


@@ -50,6 +54,10 @@ void NVMTarget_SendNVMRegAddress(uint8_t Register)
        PDITarget_SendByte(Address >> 24);\r
 }\r
 \r
        PDITarget_SendByte(Address >> 24);\r
 }\r
 \r

+/** Sends the given 32-bit absolute address to the target.\r
+ *\r
+ *  \param[in] AbsoluteAddress  Absolute address to send to the target\r
+ */\r

 void NVMTarget_SendAddress(uint32_t AbsoluteAddress)\r
 {\r
        /* Send the given 32-bit address to the target, LSB first */\r
 void NVMTarget_SendAddress(uint32_t AbsoluteAddress)\r
 {\r
        /* Send the given 32-bit address to the target, LSB first */\r


@@ -59,6 +67,11 @@ void NVMTarget_SendAddress(uint32_t AbsoluteAddress)
        PDITarget_SendByte(AbsoluteAddress >> 24);\r
 }\r
 \r
        PDITarget_SendByte(AbsoluteAddress >> 24);\r
 }\r
 \r

+/** Waits while the target's NVM controller is busy performing an operation, exiting if the\r
+ *  timeout period expires.\r
+ *\r
+ *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
+ */\r

 bool NVMTarget_WaitWhileNVMControllerBusy(void)\r
 {\r
        TCNT0 = 0;\r
 bool NVMTarget_WaitWhileNVMControllerBusy(void)\r
 {\r
        TCNT0 = 0;\r


@@ -78,7 +91,13 @@ bool NVMTarget_WaitWhileNVMControllerBusy(void)
        return false;\r
 }\r
 \r
        return false;\r
 }\r
 \r

-uint32_t NVMTarget_GetMemoryCRC(uint8_t MemoryCommand)\r
+/** Retrieves the CRC value of the given memory space.\r
+ *\r
+ *  \param[in] CRCCommand  NVM CRC command to issue to the target\r
+ *\r
+ *  \return 24-bit CRC value for the given address space\r
+ */\r
+uint32_t NVMTarget_GetMemoryCRC(uint8_t CRCCommand)\r

 {\r
        uint32_t MemoryCRC;\r
 \r
 {\r
        uint32_t MemoryCRC;\r
 \r


@@ -87,7 +106,7 @@ uint32_t NVMTarget_GetMemoryCRC(uint8_t MemoryCommand)
        /* Set the NVM command to the correct CRC read command */\r
        PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
        NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r
        /* Set the NVM command to the correct CRC read command */\r
        PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
        NVMTarget_SendNVMRegAddress(NVM_REG_CMD);\r

-       PDITarget_SendByte(MemoryCommand);\r
+       PDITarget_SendByte(CRCCommand);\r

 \r
        /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */\r
        PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
 \r
        /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */\r
        PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r


@@ -116,6 +135,12 @@ uint32_t NVMTarget_GetMemoryCRC(uint8_t MemoryCommand)
        return MemoryCRC;\r
 }\r
 \r
        return MemoryCRC;\r
 }\r
 \r

+/** Reads memory from the target's memory spaces.\r
+ *\r
+ *  \param[in]  ReadAddress  Start address to read from within the target's address space\r
+ *  \param[out] ReadBuffer   Buffer to store read data into\r
+ *  \param[in]  ReadSize     Number of bytes to read\r
+ */\r

 void NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)\r
 {\r
        NVMTarget_WaitWhileNVMControllerBusy();\r
 void NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)\r
 {\r
        NVMTarget_WaitWhileNVMControllerBusy();\r


@@ -149,6 +174,11 @@ void NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
        }\r
 }\r
 \r
        }\r
 }\r
 \r

+/** Erases a specific memory space of the target.\r
+ *\r
+ *  \param[in] EraseCommand  NVM erase command to send to the device\r
+ *  \param[in] Address  Address inside the memory space to erase\r
+ */\r

 void NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)\r
 {\r
        NVMTarget_WaitWhileNVMControllerBusy();\r
 void NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)\r
 {\r
        NVMTarget_WaitWhileNVMControllerBusy();\r