#define INCLUDE_FROM_PDITARGET_C\r
#include "PDITarget.h"\r
\r
-/** Writes a given byte to the attached XMEGA device, using a RS232 frame via software through the\r
- * PDI interface.\r
- *\r
- * \param Byte Byte to send to the attached device\r
- */\r
-void PDITarget_SendByte(uint8_t Byte)\r
+volatile bool IsSending;\r
+\r
+#if !defined(PDI_VIA_HARDWARE_USART)\r
+volatile uint16_t SoftUSART_Data;\r
+volatile uint8_t SoftUSART_BitCount;\r
+\r
+ISR(TIMER0_COMPA_vect, ISR_BLOCK)\r
{\r
- PDIDATA_LINE_PORT &= ~PDIDATA_LINE_MASK;\r
+ /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
+ BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r
\r
- TOGGLE_PDI_CLOCK;\r
+ /* If not sending or receiving, just exit */\r
+ if (!(SoftUSART_BitCount))\r
+ return;\r
\r
- for (uint8_t i = 0; i < 8; i++)\r
+ /* Check to see if the current clock state is on the rising or falling edge */\r
+ bool IsRisingEdge = (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK);\r
+\r
+ if (IsSending && !IsRisingEdge)\r
{\r
- if (Byte & 0x01)\r
- PDIDATA_LINE_PORT |= PDIDATA_LINE_MASK;\r
+ if (SoftUSART_Data & 0x01)\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
else\r
- PDIDATA_LINE_PORT &= ~PDIDATA_LINE_MASK;\r
- \r
- Byte >>= 1;\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK; \r
\r
- TOGGLE_PDI_CLOCK;\r
+ SoftUSART_Data >>= 1;\r
+ SoftUSART_BitCount--;\r
}\r
+ else if (!IsSending && IsRisingEdge)\r
+ {\r
+ /* Wait for the start bit when receiving */\r
+ if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
+ return;\r
+ \r
+ if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
+ SoftUSART_Data |= (1 << BITS_IN_FRAME);\r
\r
- PDIDATA_LINE_PORT |= PDIDATA_LINE_MASK;\r
+ SoftUSART_Data >>= 1;\r
+ SoftUSART_BitCount--;\r
+ }\r
+}\r
+#endif\r
+\r
+void PDITarget_EnableTargetPDI(void)\r
+{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
+ /* Set Tx and XCK as outputs, Rx as input */\r
+ DDRD |= (1 << 5) | (1 << 3);\r
+ DDRD &= ~(1 << 2);\r
+ \r
+ /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+ PORTD |= (1 << 3);\r
+ asm volatile ("NOP"::);\r
+ asm volatile ("NOP"::);\r
+ \r
+ /* Set up the synchronous USART for XMEGA communications - \r
+ 8 data bits, even parity, 2 stop bits */\r
+ UBRR1 = 10;\r
+ UCSR1B = (1 << TXEN1);\r
+ UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
\r
- TOGGLE_PDI_CLOCK;\r
- TOGGLE_PDI_CLOCK;\r
+ /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
+ PDITarget_SendBreak();\r
+ PDITarget_SendBreak();\r
+#else\r
+ /* Set DATA and CLOCK lines to outputs */\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
+ \r
+ /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ asm volatile ("NOP"::);\r
+ asm volatile ("NOP"::);\r
+\r
+ /* Fire timer compare ISR every 50 cycles to manage the software USART */\r
+ OCR0A = 50;\r
+ TCCR0A = (1 << WGM01);\r
+ TCCR0B = (1 << CS00);\r
+ TIMSK0 = (1 << OCIE0A);\r
+ \r
+ PDITarget_SendBreak();\r
+ PDITarget_SendBreak();\r
+#endif\r
}\r
\r
-/** Reads a given byte from the attached XMEGA device, encoded in a RS232 frame through the PDI interface.\r
- *\r
- * \return Received byte from the attached device\r
- */\r
-uint8_t PDITarget_ReceiveByte(void)\r
+void PDITarget_DisableTargetPDI(void)\r
+{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
+ /* Turn off receiver and transmitter of the USART, clear settings */\r
+ UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
+ UCSR1B = 0;\r
+ UCSR1C = 0;\r
+\r
+ /* Set all USART lines as input, tristate */\r
+ DDRD &= ~((1 << 5) | (1 << 3));\r
+ PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
+#else\r
+ /* Set DATA and CLOCK lines to inputs */\r
+ BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;\r
+ \r
+ /* Tristate DATA and CLOCK lines */\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
+\r
+ TCCR0B = 0;\r
+#endif\r
+}\r
+\r
+void PDITarget_SendByte(uint8_t Byte)\r
{\r
- uint8_t ReceivedByte = 0;\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
+ /* Switch to Tx mode if currently in Rx mode */\r
+ if (!(IsSending))\r
+ {\r
+ PORTD |= (1 << 3);\r
+ DDRD |= (1 << 3);\r
+\r
+ UCSR1B &= ~(1 << RXEN1);\r
+ UCSR1B |= (1 << TXEN1);\r
+ \r
+ IsSending = true;\r
+ }\r
+ \r
+ /* Wait until there is space in the hardware Tx buffer before writing */\r
+ while (!(UCSR1A & (1 << UDRE1)));\r
+ UDR1 = Byte;\r
+#else\r
+ /* Switch to Tx mode if currently in Rx mode */\r
+ if (!(IsSending))\r
+ {\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
\r
- PDIDATA_LINE_DDR &= ~PDIDATA_LINE_MASK;\r
+ IsSending = true;\r
+ }\r
+\r
+ bool EvenParityBit = false;\r
+ uint8_t ParityData = Byte;\r
\r
- while (PDIDATA_LINE_PIN & PDIDATA_LINE_MASK);\r
- TOGGLE_PDI_CLOCK;\r
- \r
+ /* Compute Even parity bit */\r
for (uint8_t i = 0; i < 8; i++)\r
{\r
- if (PDIDATA_LINE_PIN & PDIDATA_LINE_MASK)\r
- ReceivedByte |= 0x01;\r
+ EvenParityBit ^= ParityData & 0x01;\r
+ ParityData >>= 1;\r
+ }\r
+\r
+ while (SoftUSART_BitCount);\r
+\r
+ /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
+ SoftUSART_Data = ((uint16_t)EvenParityBit << 9) | ((uint16_t)Byte << 1) | (1 << 10) | (1 << 11);\r
+ SoftUSART_BitCount = BITS_IN_FRAME;\r
+#endif\r
+}\r
+\r
+uint8_t PDITarget_ReceiveByte(void)\r
+{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
+ /* Switch to Rx mode if currently in Tx mode */\r
+ if (IsSending)\r
+ {\r
+ while (!(UCSR1A & (1 << TXC1)));\r
+ UCSR1A |= (1 << TXC1);\r
+\r
+ UCSR1B &= ~(1 << TXEN1);\r
+ UCSR1B |= (1 << RXEN1);\r
+\r
+ DDRD &= ~(1 << 3);\r
+ PORTD &= ~(1 << 3);\r
+ \r
+ IsSending = false;\r
+ }\r
+\r
+ /* Wait until a byte has been received before reading */\r
+ while (!(UCSR1A & (1 << RXC1)));\r
+ return UDR1;\r
+#else\r
+ /* Switch to Rx mode if currently in Tx mode */\r
+ if (IsSending)\r
+ {\r
+ while (SoftUSART_BitCount);\r
\r
- ReceivedByte <<= 1;\r
+ BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
\r
- TOGGLE_PDI_CLOCK; \r
+ IsSending = false;\r
}\r
\r
- TOGGLE_PDI_CLOCK;\r
- TOGGLE_PDI_CLOCK;\r
+ /* Wait until a byte has been received before reading */\r
+ SoftUSART_BitCount = BITS_IN_FRAME;\r
+ while (SoftUSART_BitCount);\r
\r
- PDIDATA_LINE_DDR |= PDIDATA_LINE_MASK;\r
+ /* Throw away the start, parity and stop bits to leave only the data */\r
+ return (uint8_t)(SoftUSART_Data >> 1);\r
+#endif\r
+}\r
+\r
+void PDITarget_SendBreak(void)\r
+{\r
+#if defined(PDI_VIA_HARDWARE_USART)\r
+ /* Switch to Tx mode if currently in Rx mode */\r
+ if (!(IsSending))\r
+ {\r
+ PORTD |= (1 << 3);\r
+ DDRD |= (1 << 3);\r
+\r
+ UCSR1B &= ~(1 << RXEN1);\r
+ UCSR1B |= (1 << TXEN1);\r
+ \r
+ IsSending = true;\r
+ }\r
+\r
+ /* Need to do nothing for a full frame to send a BREAK */\r
+ for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)\r
+ {\r
+ /* Wait for a full cycle of the clock */\r
+ while (PIND & (1 << 5));\r
+ while (!(PIND & (1 << 5)));\r
+ }\r
+#else\r
+ /* Switch to Tx mode if currently in Rx mode */\r
+ if (!(IsSending))\r
+ {\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
+\r
+ IsSending = true;\r
+ }\r
+ \r
+ while (SoftUSART_BitCount);\r
+\r
+ /* Need to do nothing for a full frame to send a BREAK */\r
+ SoftUSART_Data = 0x0FFF;\r
+ SoftUSART_BitCount = BITS_IN_FRAME;\r
+#endif\r
+}\r
+\r
+void PDITarget_SendAddress(uint32_t Address)\r
+{\r
+ PDITarget_SendByte(Address >> 24);\r
+ PDITarget_SendByte(Address >> 26);\r
+ PDITarget_SendByte(Address >> 8);\r
+ PDITarget_SendByte(Address & 0xFF);\r
+}\r
+\r
+bool PDITarget_WaitWhileNVMBusBusy(void)\r
+{\r
+ uint8_t AttemptsRemaining = 255;\r
+\r
+ /* Poll the STATUS register to check to see if NVM access has been enabled */\r
+ while (AttemptsRemaining--)\r
+ {\r
+ PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);\r
+ if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)\r
+ return true;\r
+ }\r
\r
- return ReceivedByte;\r
+ return false;\r
+}\r
+\r
+void PDITarget_WaitWhileNVMControllerBusy(void)\r
+{\r
+ /* Poll the NVM STATUS register to check to see if NVM controller is busy */\r
+ for (;;)\r
+ {\r
+ PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_1BYTE << 2));\r
+ PDITarget_SendAddress(DATAMEM_BASE | DATAMEM_NVM_STATUS);\r
+ \r
+ if (!(PDITarget_ReceiveByte() & (1 << 7)))\r
+ return;\r
+ }\r
}\r
\r
#endif\r
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