Minor documentation improvements.

[pub/USBasp.git] / Projects / AVRISP-MKII / Lib / ISP / ISPTarget.c

diff --git a/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c b/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c
index 66a1c25..624d591 100644 (file)
--- a/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c
+++ b/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c
@@ -1,13 +1,13 @@
 /*
              LUFA Library
 /*
              LUFA Library

-     Copyright (C) Dean Camera, 2010.
+     Copyright (C) Dean Camera, 2011.

 
   dean [at] fourwalledcubicle [dot] com
            www.lufa-lib.org
 */
 
 /*
 
   dean [at] fourwalledcubicle [dot] com
            www.lufa-lib.org
 */
 
 /*

-  Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com)
+  Copyright 2011  Dean Camera (dean [at] fourwalledcubicle [dot] com)

 
   Permission to use, copy, modify, distribute, and sell this
   software and its documentation for any purpose is hereby granted
 
   Permission to use, copy, modify, distribute, and sell this
   software and its documentation for any purpose is hereby granted


@@ -117,6 +117,7 @@ volatile uint8_t SoftSPI_BitsRemaining;
 /** ISR to handle software SPI transmission and reception */
 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 {
 /** ISR to handle software SPI transmission and reception */
 ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 {

+       /* Check if rising edge (output next bit) or falling edge (read in next bit) */

        if (!(PINB & (1 << 1)))
        {
                if (SoftSPI_Data & (1 << 7))
        if (!(PINB & (1 << 1)))
        {
                if (SoftSPI_Data & (1 << 7))


@@ -178,6 +179,8 @@ void ISPTarget_DisableTargetISP(void)
                DDRB  &= ~((1 << 1) | (1 << 2));
                PORTB &= ~((1 << 0) | (1 << 3));
                
                DDRB  &= ~((1 << 1) | (1 << 2));
                PORTB &= ~((1 << 0) | (1 << 3));
                

+               /* Must re-enable rescue clock once software ISP has exited, as the timer for the rescue clock is
+                * re-purposed for software SPI */

                ISPTarget_ConfigureRescueClock();
        }
 }
                ISPTarget_ConfigureRescueClock();
        }
 }


@@ -189,19 +192,29 @@ void ISPTarget_DisableTargetISP(void)
  */
 void ISPTarget_ConfigureRescueClock(void)
 {
  */
 void ISPTarget_ConfigureRescueClock(void)
 {

-       /* Configure OCR1A as an output for the specified AVR model */
-       #if defined(USB_SERIES_2_AVR)
-       DDRC |= (1 << 6);
+       #if defined(XCK_RESCUE_CLOCK_ENABLE)
+               /* Configure XCK as an output for the specified AVR model */
+               DDRD  |= (1 << 5);
+               
+               /* Start USART to generate a 4MHz clock on the XCK pin */
+               UBRR1  = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
+               UCSR1B = (1 << TXEN1);
+               UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);

        #else
        #else

-       DDRB |= (1 << 5);
+               /* Configure OCR1A as an output for the specified AVR model */
+               #if defined(USB_SERIES_2_AVR)
+               DDRC |= (1 << 6);
+               #else
+               DDRB |= (1 << 5);
+               #endif
+
+               /* Start Timer 1 to generate a 4MHz clock on the OCR1A pin */
+               TIMSK1 = 0;
+               TCNT1  = 0;
+               OCR1A  = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
+               TCCR1A = (1 << COM1A0);
+               TCCR1B = ((1 << WGM12) | (1 << CS10));

        #endif
        #endif

-
-       /* Start Timer 1 to generate a 4MHz clock on the OCR1A pin */
-       TIMSK1 = 0;
-       TCNT1  = 0;
-       OCR1A  = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
-       TCCR1A = (1 << COM1A0);
-       TCCR1B = ((1 << WGM12) | (1 << CS10));

 }
 
 /** Configures the AVR's timer ready to produce software ISP for the slower ISP speeds that
 }
 
 /** Configures the AVR's timer ready to produce software ISP for the slower ISP speeds that