uint8_t StatusRegister = XPROGTarget_ReceiveByte();
/* We might have timed out waiting for the status register read response, check here */
- if (TimeoutExpired)
+ if (!(TimeoutTicksRemaining))
return false;
/* Check the status register read response to see if the NVM bus is enabled */
uint8_t StatusRegister = XPROGTarget_ReceiveByte();
/* We might have timed out waiting for the status register read response, check here */
- if (TimeoutExpired)
+ if (!(TimeoutTicksRemaining))
return false;
/* Check to see if the BUSY flag is still set */
XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
XPROGTarget_SendByte(PDI_RESET_KEY);
- /* Lower direction change guard time to 0 USART bits */
+ /* Lower direction change guard time to 32 USART bits */
XPROGTarget_SendByte(PDI_CMD_STCS | PDI_CTRL_REG);
- XPROGTarget_SendByte(0x07);
+ XPROGTarget_SendByte(0x02);
/* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */
XPROGTarget_SendByte(PDI_CMD_KEY);
*/
bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
{
+ *CRCDest = 0;
+
/* Wait until the NVM controller is no longer busy */
if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
return false;
/* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
- XPROGTarget_SendByte(1 << 0);
+ XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
/* Wait until the NVM bus is ready again */
if (!(XMEGANVM_WaitWhileNVMBusBusy()))
/* Send the REPEAT command to grab the CRC bytes */
XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
- XPROGTarget_SendByte(XMEGA_CRC_LENGTH - 1);
+ XPROGTarget_SendByte(XMEGA_CRC_LENGTH_BYTES - 1);
/* Read in the CRC bytes from the target */
XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
- for (uint8_t i = 0; i < XMEGA_CRC_LENGTH; i++)
+ for (uint8_t i = 0; i < XMEGA_CRC_LENGTH_BYTES; i++)
((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte();
- return (TimeoutExpired == false);
+ return (TimeoutTicksRemaining > 0);
}
/** Reads memory from the target's memory spaces.
/* Send a LD command with indirect access and post-increment to read out the bytes */
XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
- while (ReadSize-- && !(TimeoutExpired))
+ while (ReadSize-- && TimeoutTicksRemaining)
*(ReadBuffer++) = XPROGTarget_ReceiveByte();
- return (TimeoutExpired == false);
+ return (TimeoutTicksRemaining > 0);
}
/** Writes byte addressed memory to the target's memory spaces.
/* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
- XPROGTarget_SendByte(1 << 0);
+ XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
}
if (WriteSize)
/* Set CMDEX bit in NVM CTRLA register to start the erase sequence */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
- XPROGTarget_SendByte(1 << 0);
+ XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
}
else if (EraseCommand == XMEGA_NVM_CMD_ERASEEEPROM)
{
/* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
- XPROGTarget_SendByte(1 << 0);
+ XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
/* Wait until the NVM controller is no longer busy */
if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
/* Set CMDEX bit in NVM CTRLA register to start the EEPROM erase sequence */
XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
- XPROGTarget_SendByte(1 << 0);
+ XPROGTarget_SendByte(XMEGA_NVM_BIT_CTRLA_CMDEX);
}
else
{