-/*\r
- LUFA Library\r
- Copyright (C) Dean Camera, 2010.\r
- \r
- dean [at] fourwalledcubicle [dot] com\r
- www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
- Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
- Permission to use, copy, modify, distribute, and sell this \r
- software and its documentation for any purpose is hereby granted\r
- without fee, provided that the above copyright notice appear in \r
- all copies and that both that the copyright notice and this\r
- permission notice and warranty disclaimer appear in supporting \r
- documentation, and that the name of the author not be used in \r
- advertising or publicity pertaining to distribution of the \r
- software without specific, written prior permission.\r
-\r
- The author disclaim all warranties with regard to this\r
- software, including all implied warranties of merchantability\r
- and fitness. In no event shall the author be liable for any\r
- special, indirect or consequential damages or any damages\r
- whatsoever resulting from loss of use, data or profits, whether\r
- in an action of contract, negligence or other tortious action,\r
- arising out of or in connection with the use or performance of\r
- this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- * Target-related functions for the PDI Protocol decoder.\r
- */\r
-\r
-#define INCLUDE_FROM_XPROGTARGET_C\r
-#include "XPROGTarget.h"\r
-\r
-#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-/** Flag to indicate if the USART is currently in Tx or Rx mode. */\r
-volatile bool IsSending;\r
-\r
-#if !defined(XPROG_VIA_HARDWARE_USART)\r
-/** Software USART raw frame bits for transmission/reception. */\r
-volatile uint16_t SoftUSART_Data;\r
-\r
-/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */\r
-#define SoftUSART_BitCount GPIOR2\r
-\r
-\r
-/** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */\r
-ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r
-{\r
- /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
- BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r
-\r
- /* If not sending or receiving, just exit */\r
- if (!(SoftUSART_BitCount))\r
- return;\r
-\r
- /* Check to see if we are at a rising or falling edge of the clock */\r
- if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)\r
- {\r
- /* If at rising clock edge and we are in send mode, abort */\r
- if (IsSending)\r
- return;\r
- \r
- /* Wait for the start bit when receiving */\r
- if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
- return;\r
- \r
- /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
- * be discarded leaving the data to be byte-aligned for quick access */\r
- if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
- ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
-\r
- SoftUSART_Data >>= 1;\r
- SoftUSART_BitCount--;\r
- }\r
- else\r
- {\r
- /* If at falling clock edge and we are in receive mode, abort */\r
- if (!IsSending)\r
- return;\r
-\r
- /* Set the data line to the next bit value */\r
- if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- else\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK; \r
-\r
- SoftUSART_Data >>= 1;\r
- SoftUSART_BitCount--;\r
- }\r
-}\r
-\r
-/** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */\r
-ISR(TIMER1_COMPB_vect, ISR_BLOCK)\r
-{\r
- /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
- BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
-\r
- /* If not sending or receiving, just exit */\r
- if (!(SoftUSART_BitCount))\r
- return;\r
-\r
- /* Check to see if we are at a rising or falling edge of the clock */\r
- if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)\r
- {\r
- /* If at rising clock edge and we are in send mode, abort */\r
- if (IsSending)\r
- return;\r
- \r
- /* Wait for the start bit when receiving */\r
- if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))\r
- return;\r
- \r
- /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
- * be discarded leaving the data to be byte-aligned for quick access */\r
- if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
- ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
-\r
- SoftUSART_Data >>= 1;\r
- SoftUSART_BitCount--;\r
- }\r
- else\r
- {\r
- /* If at falling clock edge and we are in receive mode, abort */\r
- if (!IsSending)\r
- return;\r
-\r
- /* Set the data line to the next bit value */\r
- if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)\r
- BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
- else\r
- BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK; \r
-\r
- SoftUSART_Data >>= 1;\r
- SoftUSART_BitCount--;\r
- }\r
-}\r
-#endif\r
-\r
-/** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */\r
-void XPROGTarget_EnableTargetPDI(void)\r
-{\r
- IsSending = false;\r
-\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Set Tx and XCK as outputs, Rx as input */\r
- DDRD |= (1 << 5) | (1 << 3);\r
- DDRD &= ~(1 << 2);\r
- \r
- /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
- PORTD |= (1 << 3);\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
- \r
- /* Set up the synchronous USART for XMEGA communications - \r
- 8 data bits, even parity, 2 stop bits */\r
- UBRR1 = (F_CPU / 500000UL);\r
- UCSR1B = (1 << TXEN1);\r
- UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
-#else\r
- /* Set DATA and CLOCK lines to outputs */\r
- BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
- BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
- \r
- /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
-\r
- /* Fire timer compare channel A ISR to manage the software USART */\r
- OCR1A = BITS_BETWEEN_USART_CLOCKS;\r
- TCCR1B = (1 << WGM12) | (1 << CS10);\r
- TIMSK1 = (1 << OCIE1A);\r
-#endif\r
-\r
- /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
- XPROGTarget_SendBreak();\r
- XPROGTarget_SendBreak();\r
-}\r
-\r
-/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */\r
-void XPROGTarget_EnableTargetTPI(void)\r
-{\r
- IsSending = false;\r
-\r
- /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
- AUX_LINE_DDR |= AUX_LINE_MASK;\r
- AUX_LINE_PORT &= ~AUX_LINE_MASK;\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
-\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Set Tx and XCK as outputs, Rx as input */\r
- DDRD |= (1 << 5) | (1 << 3);\r
- DDRD &= ~(1 << 2);\r
- \r
- /* Set up the synchronous USART for XMEGA communications - \r
- 8 data bits, even parity, 2 stop bits */\r
- UBRR1 = (F_CPU / 500000UL);\r
- UCSR1B = (1 << TXEN1);\r
- UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
-#else\r
- /* Set DATA and CLOCK lines to outputs */\r
- BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;\r
- BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;\r
- \r
- /* Set DATA line high for idle state */\r
- BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
-\r
- /* Fire timer capture channel B ISR to manage the software USART */\r
- OCR1B = BITS_BETWEEN_USART_CLOCKS;\r
- TCCR1B = (1 << WGM12) | (1 << CS10);\r
- TIMSK1 = (1 << OCIE1B);\r
-#endif\r
-\r
- /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
- XPROGTarget_SendBreak();\r
- XPROGTarget_SendBreak();\r
-}\r
-\r
-/** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
-void XPROGTarget_DisableTargetPDI(void)\r
-{\r
- /* Switch to Rx mode to ensure that all pending transmissions are complete */\r
- XPROGTarget_SetRxMode();\r
-\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Turn off receiver and transmitter of the USART, clear settings */\r
- UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
- UCSR1B = 0;\r
- UCSR1C = 0;\r
-\r
- /* Set all USART lines as input, tristate */\r
- DDRD &= ~((1 << 5) | (1 << 3));\r
- PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
-#else\r
- /* Set DATA and CLOCK lines to inputs */\r
- BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;\r
- \r
- /* Tristate DATA and CLOCK lines */\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;\r
-#endif\r
-}\r
-\r
-/** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
-void XPROGTarget_DisableTargetTPI(void)\r
-{\r
- /* Switch to Rx mode to ensure that all pending transmissions are complete */\r
- XPROGTarget_SetRxMode();\r
-\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Turn off receiver and transmitter of the USART, clear settings */\r
- UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
- UCSR1B = 0;\r
- UCSR1C = 0;\r
-\r
- /* Set all USART lines as input, tristate */\r
- DDRD &= ~((1 << 5) | (1 << 3));\r
- PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
-#else\r
- /* Set DATA and CLOCK lines to inputs */\r
- BITBANG_TPIDATA_DDR &= ~BITBANG_TPIDATA_MASK;\r
- BITBANG_TPICLOCK_DDR &= ~BITBANG_TPICLOCK_MASK;\r
- \r
- /* Tristate DATA and CLOCK lines */\r
- BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;\r
- BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;\r
-#endif\r
-\r
- /* Tristate target /RESET line */\r
- AUX_LINE_DDR &= ~AUX_LINE_MASK;\r
- AUX_LINE_PORT &= ~AUX_LINE_MASK;\r
-}\r
-\r
-/** Sends a byte via the USART.\r
- *\r
- * \param[in] Byte Byte to send through the USART\r
- */\r
-void XPROGTarget_SendByte(const uint8_t Byte)\r
-{\r
- /* Switch to Tx mode if currently in Rx mode */\r
- if (!(IsSending))\r
- XPROGTarget_SetTxMode();\r
- \r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Wait until there is space in the hardware Tx buffer before writing */\r
- while (!(UCSR1A & (1 << UDRE1)));\r
- UCSR1A |= (1 << TXC1);\r
- UDR1 = Byte;\r
-#else\r
- /* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */\r
- uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
-\r
- /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
- uint8_t ParityData = Byte;\r
- while (ParityData)\r
- {\r
- NewUSARTData ^= (1 << 9);\r
- ParityData &= (ParityData - 1);\r
- }\r
-\r
- /* Wait until transmitter is idle before writing new data */\r
- while (SoftUSART_BitCount);\r
-\r
- /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
- SoftUSART_Data = NewUSARTData;\r
- SoftUSART_BitCount = BITS_IN_USART_FRAME;\r
-#endif\r
-}\r
-\r
-/** Receives a byte via the software USART, blocking until data is received.\r
- *\r
- * \return Received byte from the USART\r
- */\r
-uint8_t XPROGTarget_ReceiveByte(void)\r
-{\r
- /* Switch to Rx mode if currently in Tx mode */\r
- if (IsSending)\r
- XPROGTarget_SetRxMode();\r
-\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Wait until a byte has been received before reading */\r
- while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);\r
- return UDR1;\r
-#else\r
- /* Wait until a byte has been received before reading */\r
- SoftUSART_BitCount = BITS_IN_USART_FRAME;\r
- while (SoftUSART_BitCount && TimeoutMSRemaining);\r
-\r
- /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
- return (uint8_t)SoftUSART_Data;\r
-#endif\r
-}\r
-\r
-/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r
-void XPROGTarget_SendBreak(void)\r
-{\r
- /* Switch to Tx mode if currently in Rx mode */\r
- if (!(IsSending))\r
- XPROGTarget_SetTxMode();\r
-\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Need to do nothing for a full frame to send a BREAK */\r
- for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)\r
- {\r
- /* Wait for a full cycle of the clock */\r
- while (PIND & (1 << 5));\r
- while (!(PIND & (1 << 5)));\r
- }\r
-#else\r
- while (SoftUSART_BitCount);\r
-\r
- /* Need to do nothing for a full frame to send a BREAK */\r
- SoftUSART_Data = 0x0FFF;\r
- SoftUSART_BitCount = BITS_IN_USART_FRAME;\r
-#endif\r
-}\r
-\r
-static void XPROGTarget_SetTxMode(void)\r
-{\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Wait for a full cycle of the clock */\r
- while (PIND & (1 << 5));\r
- while (!(PIND & (1 << 5)));\r
-\r
- PORTD |= (1 << 3);\r
- DDRD |= (1 << 3);\r
-\r
- UCSR1B &= ~(1 << RXEN1);\r
- UCSR1B |= (1 << TXEN1);\r
- \r
- IsSending = true;\r
-#else\r
- while (SoftUSART_BitCount);\r
-\r
- /* Wait for a full cycle of the clock */\r
- SoftUSART_Data = 0x0001;\r
- SoftUSART_BitCount = 1;\r
- while (SoftUSART_BitCount);\r
-\r
- if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)\r
- {\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
- }\r
- else\r
- {\r
- BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
- BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK; \r
- }\r
-#endif\r
-\r
- IsSending = true;\r
-}\r
-\r
-static void XPROGTarget_SetRxMode(void)\r
-{\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
- while (!(UCSR1A & (1 << TXC1)));\r
- UCSR1A |= (1 << TXC1);\r
-\r
- UCSR1B &= ~(1 << TXEN1);\r
- UCSR1B |= (1 << RXEN1);\r
-\r
- DDRD &= ~(1 << 3);\r
- PORTD &= ~(1 << 3);\r
-#else\r
- while (SoftUSART_BitCount);\r
-\r
- if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)\r
- {\r
- BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
- }\r
- else\r
- {\r
- BITBANG_TPIDATA_DDR &= ~BITBANG_TPIDATA_MASK;\r
- BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK; \r
- }\r
- \r
- /* Wait until DATA line has been pulled up to idle by the target */\r
- while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining);\r
-#endif\r
-\r
- IsSending = false;\r
-}\r
-\r
-#endif\r
+/*
+ LUFA Library
+ Copyright (C) Dean Camera, 2011.
+
+ dean [at] fourwalledcubicle [dot] com
+ www.lufa-lib.org
+*/
+
+/*
+ Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com)
+
+ Permission to use, copy, modify, distribute, and sell this
+ software and its documentation for any purpose is hereby granted
+ without fee, provided that the above copyright notice appear in
+ all copies and that both that the copyright notice and this
+ permission notice and warranty disclaimer appear in supporting
+ documentation, and that the name of the author not be used in
+ advertising or publicity pertaining to distribution of the
+ software without specific, written prior permission.
+
+ The author disclaim all warranties with regard to this
+ software, including all implied warranties of merchantability
+ and fitness. In no event shall the author be liable for any
+ special, indirect or consequential damages or any damages
+ whatsoever resulting from loss of use, data or profits, whether
+ in an action of contract, negligence or other tortious action,
+ arising out of or in connection with the use or performance of
+ this software.
+*/
+
+/** \file
+ *
+ * Target-related functions for the PDI Protocol decoder.
+ */
+
+#define INCLUDE_FROM_XPROGTARGET_C
+#include "XPROGTarget.h"
+
+#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
+
+/** Flag to indicate if the USART is currently in Tx or Rx mode. */
+bool IsSending;
+
+/** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
+void XPROGTarget_EnableTargetPDI(void)
+{
+ IsSending = false;
+
+ /* Set Tx and XCK as outputs, Rx as input */
+ DDRD |= (1 << 5) | (1 << 3);
+ DDRD &= ~(1 << 2);
+
+ /* Set DATA line high for at least 90ns to disable /RESET functionality */
+ PORTD |= (1 << 3);
+ _delay_us(1);
+
+ /* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */
+ UBRR1 = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1);
+ UCSR1B = (1 << TXEN1);
+ UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
+
+ /* Send two IDLEs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
+ XPROGTarget_SendIdle();
+ XPROGTarget_SendIdle();
+}
+
+/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
+void XPROGTarget_EnableTargetTPI(void)
+{
+ IsSending = false;
+
+ /* Set /RESET line low for at least 400ns to enable TPI functionality */
+ AUX_LINE_DDR |= AUX_LINE_MASK;
+ AUX_LINE_PORT &= ~AUX_LINE_MASK;
+ _delay_us(1);
+
+ /* Set Tx and XCK as outputs, Rx as input */
+ DDRD |= (1 << 5) | (1 << 3);
+ DDRD &= ~(1 << 2);
+
+ /* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */
+ UBRR1 = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1);
+ UCSR1B = (1 << TXEN1);
+ UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
+
+ /* Send two IDLEs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
+ XPROGTarget_SendIdle();
+ XPROGTarget_SendIdle();
+}
+
+/** Disables the target's PDI interface, exits programming mode and starts the target's application. */
+void XPROGTarget_DisableTargetPDI(void)
+{
+ /* Switch to Rx mode to ensure that all pending transmissions are complete */
+ XPROGTarget_SetRxMode();
+
+ /* Turn off receiver and transmitter of the USART, clear settings */
+ UCSR1A = ((1 << TXC1) | (1 << RXC1));
+ UCSR1B = 0;
+ UCSR1C = 0;
+
+ /* Tristate all pins */
+ DDRD &= ~((1 << 5) | (1 << 3));
+ PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
+}
+
+/** Disables the target's TPI interface, exits programming mode and starts the target's application. */
+void XPROGTarget_DisableTargetTPI(void)
+{
+ /* Switch to Rx mode to ensure that all pending transmissions are complete */
+ XPROGTarget_SetRxMode();
+
+ /* Turn off receiver and transmitter of the USART, clear settings */
+ UCSR1A |= (1 << TXC1) | (1 << RXC1);
+ UCSR1B = 0;
+ UCSR1C = 0;
+
+ /* Set all USART lines as inputs, tristate */
+ DDRD &= ~((1 << 5) | (1 << 3));
+ PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
+
+ /* Tristate target /RESET line */
+ AUX_LINE_DDR &= ~AUX_LINE_MASK;
+ AUX_LINE_PORT &= ~AUX_LINE_MASK;
+}
+
+/** Sends a byte via the USART.
+ *
+ * \param[in] Byte Byte to send through the USART
+ */
+void XPROGTarget_SendByte(const uint8_t Byte)
+{
+ /* Switch to Tx mode if currently in Rx mode */
+ if (!(IsSending))
+ XPROGTarget_SetTxMode();
+
+ /* Wait until there is space in the hardware Tx buffer before writing */
+ while (!(UCSR1A & (1 << UDRE1)));
+ UCSR1A |= (1 << TXC1);
+ UDR1 = Byte;
+}
+
+/** Receives a byte via the hardware USART, blocking until data is received or timeout expired.
+ *
+ * \return Received byte from the USART
+ */
+uint8_t XPROGTarget_ReceiveByte(void)
+{
+ /* Switch to Rx mode if currently in Tx mode */
+ if (IsSending)
+ XPROGTarget_SetRxMode();
+
+ /* Wait until a byte has been received before reading */
+ while (!(UCSR1A & (1 << RXC1)) && !(TimeoutExpired));
+
+ return UDR1;
+}
+
+/** Sends an IDLE via the USART to the attached target, consisting of a full frame of idle bits. */
+void XPROGTarget_SendIdle(void)
+{
+ /* Switch to Tx mode if currently in Rx mode */
+ if (!(IsSending))
+ XPROGTarget_SetTxMode();
+
+ /* Need to do nothing for a full frame to send an IDLE */
+ for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
+ {
+ /* Wait for a full cycle of the clock */
+ while (PIND & (1 << 5));
+ while (!(PIND & (1 << 5)));
+ }
+}
+
+static void XPROGTarget_SetTxMode(void)
+{
+ /* Need to do nothing for a full frame to send a BREAK - only one cycle should be needed, however
+ * there are reports that sometimes the interface will get stuck in some environments. */
+ for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
+ {
+ /* Wait for a full cycle of the clock */
+ while (PIND & (1 << 5));
+ while (!(PIND & (1 << 5)));
+ }
+
+ PORTD |= (1 << 3);
+ DDRD |= (1 << 3);
+
+ UCSR1B &= ~(1 << RXEN1);
+ UCSR1B |= (1 << TXEN1);
+
+ IsSending = true;
+}
+
+static void XPROGTarget_SetRxMode(void)
+{
+ while (!(UCSR1A & (1 << TXC1)));
+ UCSR1A |= (1 << TXC1);
+
+ UCSR1B &= ~(1 << TXEN1);
+ UCSR1B |= (1 << RXEN1);
+
+ DDRD &= ~(1 << 3);
+ PORTD &= ~(1 << 3);
+
+ IsSending = false;
+}
+
+#endif
+
projects / pub / USBasp.git / blobdiff