*\r
* \param[in] Register NVM register whose absolute address is to be sent\r
*/\r
-void NVMTarget_SendNVMRegAddress(uint8_t Register)\r
+void NVMTarget_SendNVMRegAddress(const uint8_t Register)\r
{\r
/* Determine the absolute register address from the NVM base memory address and the NVM register address */\r
uint32_t Address = XPROG_Param_NVMBase | Register;\r
*\r
* \param[in] AbsoluteAddress Absolute address to send to the target\r
*/\r
-void NVMTarget_SendAddress(uint32_t AbsoluteAddress)\r
+void NVMTarget_SendAddress(const uint32_t AbsoluteAddress)\r
{\r
/* Send the given 32-bit address to the target, LSB first */\r
PDITarget_SendByte(AbsoluteAddress & 0xFF);\r
*\r
* \return Boolean true if the command sequence complete successfully\r
*/\r
-bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest)\r
+bool NVMTarget_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)\r
{\r
/* Wait until the NVM controller is no longer busy */\r
if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
*\r
* \return Boolean true if the command sequence complete successfully\r
*/\r
-bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)\r
+bool NVMTarget_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, const uint16_t ReadSize)\r
{\r
/* Wait until the NVM controller is no longer busy */\r
if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
*\r
* \return Boolean true if the command sequence complete successfully\r
*/\r
-bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer)\r
+bool NVMTarget_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t* WriteBuffer)\r
{\r
/* Wait until the NVM controller is no longer busy */\r
if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r
\r
/* Send new memory byte to the memory to the target */\r
PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- NVMTarget_SendAddress(WriteAddress++);\r
+ NVMTarget_SendAddress(WriteAddress);\r
PDITarget_SendByte(*(WriteBuffer++));\r
\r
return true;\r
*\r
* \return Boolean true if the command sequence complete successfully\r
*/\r
-bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffCommand, uint8_t WritePageCommand,\r
- uint8_t PageMode, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)\r
+bool NVMTarget_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
+ const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
+ const uint8_t* WriteBuffer, const uint16_t WriteSize)\r
{\r
if (PageMode & XPRG_PAGEMODE_ERASE)\r
{\r
*\r
* \return Boolean true if the command sequence complete successfully\r
*/\r
-bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)\r
+bool NVMTarget_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)\r
{\r
/* Wait until the NVM controller is no longer busy */\r
if (!(NVMTarget_WaitWhileNVMControllerBusy()))\r