#define SoftUSART_BitCount GPIOR2\r
\r
\r
-/** ISR to manage the rising edge of the PDI/TPI software USART when bit-banged USART mode is selected. */\r
+/** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */\r
ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r
{\r
/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
- BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r
- TIFR1 |= (1 << OCF1B);\r
- TIMSK1 = (1 << OCIE1B);\r
+ BITBANG_PDICLOCK_PIN = BITBANG_PDICLOCK_MASK;\r
\r
/* If not sending or receiving, just exit */\r
if (!(SoftUSART_BitCount))\r
return;\r
\r
- /* If at rising clock edge and we are in send mode, abort */\r
- if (IsSending)\r
- return;\r
- \r
- /* Wait for the start bit when receiving */\r
- if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
- return;\r
-\r
- /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
- * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */\r
- if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
- ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
-\r
- SoftUSART_Data >>= 1;\r
- SoftUSART_BitCount--;\r
-}\r
-\r
-/** ISR to manage the falling edge of the PDI/TPI software USART when bit-banged USART mode is selected. */\r
-ISR(TIMER1_COMPB_vect, ISR_BLOCK)\r
-{\r
- /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
- BITBANG_PDICLOCK_PIN |= BITBANG_PDICLOCK_MASK;\r
- TIFR1 |= (1 << OCF1A);\r
- TIMSK1 = (1 << OCIE1A);\r
-\r
- /* If not sending or receiving, just exit */\r
- if (!(SoftUSART_BitCount))\r
- return;\r
+ /* Check to see if we are at a rising or falling edge of the clock */\r
+ if (BITBANG_PDICLOCK_PORT & BITBANG_PDICLOCK_MASK)\r
+ {\r
+ /* If at rising clock edge and we are in send mode, abort */\r
+ if (IsSending)\r
+ return;\r
+ \r
+ /* Wait for the start bit when receiving */\r
+ if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
+ return;\r
\r
- /* If at falling clock edge and we are in receive mode, abort */\r
- if (!IsSending)\r
- return;\r
+ /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
+ * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */\r
+ if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
+ ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
\r
- /* Set the data line to the next bit value */\r
- if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ SoftUSART_Data >>= 1;\r
+ SoftUSART_BitCount--;\r
+ }\r
else\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK; \r
+ {\r
+ /* If at falling clock edge and we are in receive mode, abort */\r
+ if (!IsSending)\r
+ return;\r
\r
- SoftUSART_Data >>= 1;\r
- SoftUSART_BitCount--;\r
+ /* Set the data line to the next bit value */\r
+ if (((uint8_t*)&SoftUSART_Data)[0] & 0x01)\r
+ BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
+ else\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK; \r
+\r
+ SoftUSART_Data >>= 1;\r
+ SoftUSART_BitCount--; \r
+ }\r
}\r
\r
/** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */\r
ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r
{\r
/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
- BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
+ BITBANG_TPICLOCK_PIN = BITBANG_TPICLOCK_MASK;\r
\r
/* If not sending or receiving, just exit */\r
if (!(SoftUSART_BitCount))\r
\r
/* Set up the synchronous USART for XMEGA communications - \r
8 data bits, even parity, 2 stop bits */\r
- UBRR1 = (F_CPU / 500000UL);\r
+ UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);\r
UCSR1B = (1 << TXEN1);\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
#else\r
OCR1A = BITS_BETWEEN_USART_CLOCKS;\r
OCR1B = BITS_BETWEEN_USART_CLOCKS;\r
TCCR1B = (1 << WGM12) | (1 << CS10);\r
- TCCR1C = (1 << FOC1B);\r
TIMSK1 = (1 << OCIE1A);\r
#endif\r
\r
\r
/* Set up the synchronous USART for TINY communications - \r
8 data bits, even parity, 2 stop bits */\r
- UBRR1 = (F_CPU / 500000UL);\r
+ UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);\r
UCSR1B = (1 << TXEN1);\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
#else\r
XPROGTarget_SetRxMode();\r
\r
#if defined(XPROG_VIA_HARDWARE_USART)\r
- /* Set /RESET high for a one millisecond to ensure target device is restarted */\r
- PORTD |= (1 << 5);\r
- _delay_ms(1);\r
-\r
/* Turn off receiver and transmitter of the USART, clear settings */\r
- UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
+ UCSR1A = ((1 << TXC1) | (1 << RXC1));\r
UCSR1B = 0;\r
UCSR1C = 0;\r
\r
- /* Set all USART lines as input, tristate */\r
+ /* Tristate all pins */\r
DDRD &= ~((1 << 5) | (1 << 3));\r
PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
#else\r
/* Turn off software USART management timer */\r
TCCR1B = 0;\r
- TCCR1C = 0;\r
-\r
- /* Set /RESET high for a one millisecond to ensure target device is restarted */\r
- BITBANG_PDICLOCK_PORT |= BITBANG_PDICLOCK_MASK;\r
- _delay_ms(1);\r
\r
/* Set DATA and CLOCK lines to inputs */\r
BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
projects / pub / USBasp.git / blobdiff