Newer AS7 integration binary, with ASF detection fixes and newer image assets.

[pub/USBasp.git] / Demos / Device / LowLevel / MassStorage / MassStorage.c

diff --git a/Demos/Device/LowLevel/MassStorage/MassStorage.c b/Demos/Device/LowLevel/MassStorage/MassStorage.c
index 2243b7f..46762d4 100644 (file)
--- a/Demos/Device/LowLevel/MassStorage/MassStorage.c
+++ b/Demos/Device/LowLevel/MassStorage/MassStorage.c
@@ -1,13 +1,13 @@
 /*
              LUFA Library
 /*
              LUFA Library

-     Copyright (C) Dean Camera, 2013.
+     Copyright (C) Dean Camera, 2015.

 
   dean [at] fourwalledcubicle [dot] com
            www.lufa-lib.org
 */
 
 /*
 
   dean [at] fourwalledcubicle [dot] com
            www.lufa-lib.org
 */
 
 /*

-  Copyright 2013  Dean Camera (dean [at] fourwalledcubicle [dot] com)
+  Copyright 2015  Dean Camera (dean [at] fourwalledcubicle [dot] com)

 
   Permission to use, copy, modify, distribute, and sell this
   software and its documentation for any purpose is hereby granted
 
   Permission to use, copy, modify, distribute, and sell this
   software and its documentation for any purpose is hereby granted


@@ -67,16 +67,27 @@ int main(void)
 /** Configures the board hardware and chip peripherals for the demo's functionality. */
 void SetupHardware(void)
 {
 /** Configures the board hardware and chip peripherals for the demo's functionality. */
 void SetupHardware(void)
 {

+#if (ARCH == ARCH_AVR8)

        /* Disable watchdog if enabled by bootloader/fuses */
        MCUSR &= ~(1 << WDRF);
        wdt_disable();
 
        /* Disable clock division */
        clock_prescale_set(clock_div_1);
        /* Disable watchdog if enabled by bootloader/fuses */
        MCUSR &= ~(1 << WDRF);
        wdt_disable();
 
        /* Disable clock division */
        clock_prescale_set(clock_div_1);

+#elif (ARCH == ARCH_XMEGA)
+       /* Start the PLL to multiply the 2MHz RC oscillator to 32MHz and switch the CPU core to run from it */
+       XMEGACLK_StartPLL(CLOCK_SRC_INT_RC2MHZ, 2000000, F_CPU);
+       XMEGACLK_SetCPUClockSource(CLOCK_SRC_PLL);
+
+       /* Start the 32MHz internal RC oscillator and start the DFLL to increase it to 48MHz using the USB SOF as a reference */
+       XMEGACLK_StartInternalOscillator(CLOCK_SRC_INT_RC32MHZ);
+       XMEGACLK_StartDFLL(CLOCK_SRC_INT_RC32MHZ, DFLL_REF_INT_USBSOF, F_USB);
+
+       PMIC.CTRL = PMIC_LOLVLEN_bm | PMIC_MEDLVLEN_bm | PMIC_HILVLEN_bm;
+#endif

 
        /* Hardware Initialization */
        LEDs_Init();
 
        /* Hardware Initialization */
        LEDs_Init();

-       SPI_Init(SPI_SPEED_FCPU_DIV_2 | SPI_ORDER_MSB_FIRST | SPI_SCK_LEAD_FALLING | SPI_SAMPLE_TRAILING | SPI_MODE_MASTER);

        Dataflash_Init();
        USB_Init();
 
        Dataflash_Init();
        USB_Init();
 


@@ -222,7 +233,7 @@ void MassStorage_Task(void)
 /** Function to read in a command block from the host, via the bulk data OUT endpoint. This function reads in the next command block
  *  if one has been issued, and performs validation to ensure that the block command is valid.
  *
 /** Function to read in a command block from the host, via the bulk data OUT endpoint. This function reads in the next command block
  *  if one has been issued, and performs validation to ensure that the block command is valid.
  *

- *  \return Boolean true if a valid command block has been read in from the endpoint, false otherwise
+ *  \return Boolean \c true if a valid command block has been read in from the endpoint, \c false otherwise

  */
 static bool ReadInCommandBlock(void)
 {
  */
 static bool ReadInCommandBlock(void)
 {