/*\r
LUFA Library\r
- Copyright (C) Dean Camera, 2009.\r
+ Copyright (C) Dean Camera, 2010.\r
\r
dean [at] fourwalledcubicle [dot] com\r
www.fourwalledcubicle.com\r
*/\r
\r
/*\r
- Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+ Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
\r
Permission to use, copy, modify, distribute, and sell this \r
software and its documentation for any purpose is hereby granted\r
return;\r
\r
/* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
- * be discarded leaving the data to be byte-aligned for quick access */\r
+ * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */\r
if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
\r
}\r
\r
/** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */\r
-ISR(TIMER1_COMPB_vect, ISR_BLOCK)\r
+ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r
{\r
/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
return;\r
\r
/* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
- * be discarded leaving the data to be byte-aligned for quick access */\r
+ * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */\r
if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
\r
DDRD |= (1 << 5) | (1 << 3);\r
DDRD &= ~(1 << 2);\r
\r
- /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+ /* Set DATA line high for at least 90ns to disable /RESET functionality (note: too long will enable it again,\r
+ * so a fixed number of NOPs are used here */\r
PORTD |= (1 << 3);\r
asm volatile ("NOP"::);\r
asm volatile ("NOP"::);\r
\r
/* Set up the synchronous USART for XMEGA communications - \r
8 data bits, even parity, 2 stop bits */\r
- UBRR1 = (F_CPU / 1000000UL);\r
+ UBRR1 = (F_CPU / 500000UL);\r
UCSR1B = (1 << TXEN1);\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
#else\r
BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
\r
- /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+ /* Set DATA line high for at least 90ns to disable /RESET functionality (note: too long will enable it again,\r
+ * so a fixed number of NOPs are used here */\r
BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
asm volatile ("NOP"::);\r
asm volatile ("NOP"::);\r
{\r
IsSending = false;\r
\r
- /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
- RESET_LINE_DDR |= RESET_LINE_MASK;\r
- RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
+ /* Set /RESET line low for at least 400ns to enable TPI functionality */\r
+ AUX_LINE_DDR |= AUX_LINE_MASK;\r
+ AUX_LINE_PORT &= ~AUX_LINE_MASK;\r
+ _delay_ms(1);\r
\r
#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Set Tx and XCK as outputs, Rx as input */\r
DDRD |= (1 << 5) | (1 << 3);\r
DDRD &= ~(1 << 2);\r
\r
- /* Set up the synchronous USART for XMEGA communications - \r
+ /* Set up the synchronous USART for TINY communications - \r
8 data bits, even parity, 2 stop bits */\r
- UBRR1 = (F_CPU / 1000000UL);\r
+ UBRR1 = (F_CPU / 500000UL);\r
UCSR1B = (1 << TXEN1);\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
#else\r
/* Set DATA line high for idle state */\r
BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
\r
- /* Fire timer capture channel B ISR to manage the software USART */\r
- OCR1B = BITS_BETWEEN_USART_CLOCKS;\r
- TCCR1B = (1 << WGM12) | (1 << CS10);\r
- TIMSK1 = (1 << OCIE1B);\r
+ /* Fire timer capture channel ISR to manage the software USART */\r
+ ICR1 = BITS_BETWEEN_USART_CLOCKS;\r
+ TCCR1B = (1 << WGM13) | (1 << WGM12) | (1 << CS10);\r
+ TIMSK1 = (1 << ICIE1);\r
#endif\r
\r
/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
/** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
void XPROGTarget_DisableTargetPDI(void)\r
{\r
+ /* Switch to Rx mode to ensure that all pending transmissions are complete */\r
+ XPROGTarget_SetRxMode();\r
+\r
#if defined(XPROG_VIA_HARDWARE_USART)\r
+ /* Set /RESET high for a one millisecond to ensure target device is restarted */\r
+ PORTD |= (1 << 5);\r
+ _delay_ms(1);\r
+\r
/* Turn off receiver and transmitter of the USART, clear settings */\r
UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
UCSR1B = 0;\r
DDRD &= ~((1 << 5) | (1 << 3));\r
PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
#else\r
+ /* Set /RESET high for a one millisecond to ensure target device is restarted */\r
+ BITBANG_PDICLOCK_PORT |= BITBANG_PDICLOCK_MASK;\r
+ _delay_ms(1);\r
+\r
/* Set DATA and CLOCK lines to inputs */\r
BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;\r
/** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
void XPROGTarget_DisableTargetTPI(void)\r
{\r
+ /* Switch to Rx mode to ensure that all pending transmissions are complete */\r
+ XPROGTarget_SetRxMode();\r
+\r
#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Turn off receiver and transmitter of the USART, clear settings */\r
UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
#endif\r
\r
/* Tristate target /RESET line */\r
- RESET_LINE_DDR &= ~RESET_LINE_MASK;\r
- RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
+ AUX_LINE_DDR &= ~AUX_LINE_MASK;\r
+ AUX_LINE_PORT &= ~AUX_LINE_MASK;\r
}\r
\r
/** Sends a byte via the USART.\r
*/\r
void XPROGTarget_SendByte(const uint8_t Byte)\r
{\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Switch to Tx mode if currently in Rx mode */\r
if (!(IsSending))\r
- {\r
- PORTD |= (1 << 3);\r
- DDRD |= (1 << 3);\r
-\r
- UCSR1B |= (1 << TXEN1);\r
- UCSR1B &= ~(1 << RXEN1);\r
- \r
- IsSending = true;\r
- }\r
- \r
+ XPROGTarget_SetTxMode();\r
+ \r
+#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Wait until there is space in the hardware Tx buffer before writing */\r
while (!(UCSR1A & (1 << UDRE1)));\r
UCSR1A |= (1 << TXC1);\r
UDR1 = Byte;\r
#else\r
- /* Switch to Tx mode if currently in Rx mode */\r
- if (!(IsSending))\r
- {\r
- BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
-\r
- IsSending = true;\r
- }\r
-\r
/* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */\r
uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
\r
/* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
- uint8_t ParityData = Byte;\r
+ uint8_t ParityData = Byte;\r
while (ParityData)\r
{\r
NewUSARTData ^= (1 << 9);\r
*/\r
uint8_t XPROGTarget_ReceiveByte(void)\r
{\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Switch to Rx mode if currently in Tx mode */\r
if (IsSending)\r
- {\r
- while (!(UCSR1A & (1 << TXC1)));\r
- UCSR1A |= (1 << TXC1);\r
-\r
- UCSR1B &= ~(1 << TXEN1);\r
- UCSR1B |= (1 << RXEN1);\r
-\r
- DDRD &= ~(1 << 3);\r
- PORTD &= ~(1 << 3);\r
- \r
- IsSending = false;\r
- }\r
+ XPROGTarget_SetRxMode();\r
\r
+#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Wait until a byte has been received before reading */\r
while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);\r
return UDR1;\r
#else\r
- /* Switch to Rx mode if currently in Tx mode */\r
- if (IsSending)\r
- {\r
- while (SoftUSART_BitCount);\r
-\r
- BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
- BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
-\r
- IsSending = false;\r
- }\r
-\r
/* Wait until a byte has been received before reading */\r
SoftUSART_BitCount = BITS_IN_USART_FRAME;\r
while (SoftUSART_BitCount && TimeoutMSRemaining);\r
/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r
void XPROGTarget_SendBreak(void)\r
{\r
-#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Switch to Tx mode if currently in Rx mode */\r
if (!(IsSending))\r
- {\r
- PORTD |= (1 << 3);\r
- DDRD |= (1 << 3);\r
-\r
- UCSR1B &= ~(1 << RXEN1);\r
- UCSR1B |= (1 << TXEN1);\r
- \r
- IsSending = true;\r
- }\r
+ XPROGTarget_SetTxMode();\r
\r
+#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Need to do nothing for a full frame to send a BREAK */\r
for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)\r
{\r
while (!(PIND & (1 << 5)));\r
}\r
#else\r
- /* Switch to Tx mode if currently in Rx mode */\r
- if (!(IsSending))\r
+ while (SoftUSART_BitCount);\r
+\r
+ /* Need to do nothing for a full frame to send a BREAK */\r
+ SoftUSART_Data = 0x0FFF;\r
+ SoftUSART_BitCount = BITS_IN_USART_FRAME;\r
+#endif\r
+}\r
+\r
+static void XPROGTarget_SetTxMode(void)\r
+{\r
+#if defined(XPROG_VIA_HARDWARE_USART)\r
+ /* Wait for a full cycle of the clock */\r
+ while (PIND & (1 << 5));\r
+ while (!(PIND & (1 << 5)));\r
+\r
+ PORTD |= (1 << 3);\r
+ DDRD |= (1 << 3);\r
+\r
+ UCSR1B &= ~(1 << RXEN1);\r
+ UCSR1B |= (1 << TXEN1);\r
+ \r
+ IsSending = true;\r
+#else\r
+ while (SoftUSART_BitCount);\r
+\r
+ /* Wait for a full cycle of the clock */\r
+ SoftUSART_Data = 0x0001;\r
+ SoftUSART_BitCount = 1;\r
+ while (SoftUSART_BitCount);\r
+\r
+ if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)\r
{\r
BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;\r
-\r
- IsSending = true;\r
}\r
- \r
+ else\r
+ {\r
+ BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
+ BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK; \r
+ }\r
+#endif\r
+\r
+ IsSending = true;\r
+}\r
+\r
+static void XPROGTarget_SetRxMode(void)\r
+{\r
+#if defined(XPROG_VIA_HARDWARE_USART)\r
+ while (!(UCSR1A & (1 << TXC1)));\r
+ UCSR1A |= (1 << TXC1);\r
+\r
+ UCSR1B &= ~(1 << TXEN1);\r
+ UCSR1B |= (1 << RXEN1);\r
+\r
+ DDRD &= ~(1 << 3);\r
+ PORTD &= ~(1 << 3);\r
+#else\r
while (SoftUSART_BitCount);\r
\r
- /* Need to do nothing for a full frame to send a BREAK */\r
- SoftUSART_Data = 0x0FFF;\r
- SoftUSART_BitCount = BITS_IN_USART_FRAME;\r
+ if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)\r
+ {\r
+ BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
+ BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;\r
+ }\r
+ else\r
+ {\r
+ BITBANG_TPIDATA_DDR &= ~BITBANG_TPIDATA_MASK;\r
+ BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK; \r
+ }\r
+ \r
+ /* Wait until DATA line has been pulled up to idle by the target */\r
+ while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining);\r
#endif\r
+\r
+ IsSending = false;\r
}\r
\r
#endif\r
projects / pub / USBasp.git / blobdiff