Fix up the incomplete Webserver project so that it integrates with the uIP stack...

[pub/USBasp.git] / Projects / AVRISP-MKII / Lib / XPROG / XPROGTarget.h

diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h
index a892829..ff0be48 100644 (file)
--- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h
+++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.h
@@ -1,13 +1,13 @@
 /*\r
              LUFA Library\r
-     Copyright (C) Dean Camera, 2009.\r
+     Copyright (C) Dean Camera, 2010.\r
               \r
   dean [at] fourwalledcubicle [dot] com\r
       www.fourwalledcubicle.com\r
 */\r
 \r
 /*\r
-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+  Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
 \r
   Permission to use, copy, modify, distribute, and sell this \r
   software and its documentation for any purpose is hereby granted\r
@@ -44,6 +44,7 @@
                #include <LUFA/Common/Common.h>\r
                \r
                #include "../V2Protocol.h"\r
+               #include "XPROGProtocol.h"\r
        \r
        /* Preprocessor Checks: */\r
                #if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))\r
@@ -63,10 +64,10 @@
                        #define BITBANG_PDIDATA_PIN      PINB\r
                        #define BITBANG_PDIDATA_MASK     (1 << 3)\r
                        \r
-                       #define BITBANG_PDICLOCK_PORT    RESET_LINE_PORT\r
-                       #define BITBANG_PDICLOCK_DDR     RESET_LINE_DDR\r
-                       #define BITBANG_PDICLOCK_PIN     RESET_LINE_PIN\r
-                       #define BITBANG_PDICLOCK_MASK    RESET_LINE_MASK\r
+                       #define BITBANG_PDICLOCK_PORT    AUX_LINE_PORT\r
+                       #define BITBANG_PDICLOCK_DDR     AUX_LINE_DDR\r
+                       #define BITBANG_PDICLOCK_PIN     AUX_LINE_PIN\r
+                       #define BITBANG_PDICLOCK_MASK    AUX_LINE_MASK\r
 \r
                        #define BITBANG_TPIDATA_PORT     PORTB\r
                        #define BITBANG_TPIDATA_DDR      DDRB\r
@@ -80,7 +81,7 @@
                #endif\r
                \r
                /** Number of cycles between each clock when software USART mode is used */\r
-               #define BITS_BETWEEN_USART_CLOCKS  100\r
+               #define BITS_BETWEEN_USART_CLOCKS  200\r
                \r
                /** Total number of bits in a single USART frame */\r
                #define BITS_IN_USART_FRAME        12\r
@@ -99,8 +100,8 @@
                #define PDI_CTRL_REG               2\r
                \r
                #define PDI_STATUS_NVM             (1 << 1)\r
-               #define PDI_RESET_KEY              0x59\r
 \r
+               #define PDI_RESET_KEY              0x59\r
                #define PDI_NVMENABLE_KEY          (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}\r
 \r
                #define PDI_DATSIZE_1BYTE          0\r
@@ -141,5 +142,10 @@
                uint8_t XPROGTarget_ReceiveByte(void);\r
                void    XPROGTarget_SendBreak(void);\r
                bool    XPROGTarget_WaitWhileNVMBusBusy(void);\r
+               \r
+               #if defined(INCLUDE_FROM_XPROGTARGET_C)\r
+                       static void XPROGTarget_SetTxMode(void);\r
+                       static void XPROGTarget_SetRxMode(void);\r
+               #endif\r
 \r
 #endif\r