Added const where possible to the source functions in the Projects directory.

[pub/USBasp.git] / Projects / AVRISP / Lib / XPROG / XPROGTarget.c

diff --git a/Projects/AVRISP/Lib/XPROG/XPROGTarget.c b/Projects/AVRISP/Lib/XPROG/XPROGTarget.c
index 4070c09..59c85f3 100644 (file)
--- a/Projects/AVRISP/Lib/XPROG/XPROGTarget.c
+++ b/Projects/AVRISP/Lib/XPROG/XPROGTarget.c
@@ -33,8 +33,8 @@
  *  Target-related functions for the PDI Protocol decoder.\r
  */\r
 \r
  *  Target-related functions for the PDI Protocol decoder.\r
  */\r
 \r

-#define  INCLUDE_FROM_PDITARGET_C\r
-#include "PDITarget.h"\r
+#define  INCLUDE_FROM_XPROGTARGET_C\r
+#include "XPROGTarget.h"\r

 \r
 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)\r
 \r
 \r
 #if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)\r
 \r


@@ -49,7 +49,53 @@ volatile uint16_t           SoftUSART_Data;
 #define SoftUSART_BitCount  GPIOR2\r
 \r
 \r
 #define SoftUSART_BitCount  GPIOR2\r
 \r
 \r

-/** ISR to manage the software USART when bit-banged USART mode is selected. */\r
+/** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */\r
+ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r
+{\r
+       /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
+       BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
+\r
+       /* If not sending or receiving, just exit */\r
+       if (!(SoftUSART_BitCount))\r
+         return;\r
+\r
+       /* Check to see if we are at a rising or falling edge of the clock */\r
+       if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)\r
+       {\r
+               /* If at rising clock edge and we are in send mode, abort */\r
+               if (IsSending)\r
+                 return;\r
+                 \r
+               /* Wait for the start bit when receiving */\r
+               if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))\r
+                 return;\r
+       \r
+               /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
+                * be discarded leaving the data to be byte-aligned for quick access */\r
+               if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
+                 SoftUSART_Data |= (1 << (BITS_IN_USART_FRAME - 1));\r
+\r
+               SoftUSART_Data >>= 1;\r
+               SoftUSART_BitCount--;\r
+       }\r
+       else\r
+       {\r
+               /* If at falling clock edge and we are in receive mode, abort */\r
+               if (!IsSending)\r
+                 return;\r
+\r
+               /* Set the data line to the next bit value */\r
+               if (SoftUSART_Data & 0x01)\r
+                 BITBANG_TPIDATA_PORT |=  BITBANG_TPIDATA_MASK;\r
+               else\r
+                 BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;                  \r
+\r
+               SoftUSART_Data >>= 1;\r
+               SoftUSART_BitCount--;\r
+       }\r
+}\r
+\r
+/** ISR to manage the PDI software USART when bit-banged PDI USART mode is selected. */\r

 ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r
 {\r
        /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
 ISR(TIMER1_COMPA_vect, ISR_BLOCK)\r
 {\r
        /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r


@@ -67,13 +113,13 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
                  return;\r
                  \r
                /* Wait for the start bit when receiving */\r
                  return;\r
                  \r
                /* Wait for the start bit when receiving */\r

-               if ((SoftUSART_BitCount == BITS_IN_PDI_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r
+               if ((SoftUSART_BitCount == BITS_IN_USART_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))\r

                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
                 * be discarded leaving the data to be byte-aligned for quick access */\r
                if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
                 * be discarded leaving the data to be byte-aligned for quick access */\r
                if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r

-                 SoftUSART_Data |= (1 << (BITS_IN_PDI_FRAME - 1));\r
+                 SoftUSART_Data |= (1 << (BITS_IN_USART_FRAME - 1));\r

 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r
 \r
                SoftUSART_Data >>= 1;\r
                SoftUSART_BitCount--;\r


@@ -96,8 +142,50 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 }\r
 #endif\r
 \r
 }\r
 #endif\r
 \r

+/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */\r
+void XPROGTarget_EnableTargetTPI(void)\r
+{\r
+       /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
+       RESET_LINE_DDR  |= RESET_LINE_MASK;\r
+       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r
+       asm volatile ("NOP"::);\r
+       asm volatile ("NOP"::);\r
+\r
+#if defined(XPROG_VIA_HARDWARE_USART)\r
+       /* Set Tx and XCK as outputs, Rx as input */\r
+       DDRD |=  (1 << 5) | (1 << 3);\r
+       DDRD &= ~(1 << 2);\r
+               \r
+       /* Set up the synchronous USART for XMEGA communications - \r
+          8 data bits, even parity, 2 stop bits */\r
+       UBRR1  = (F_CPU / 1000000UL);\r
+       UCSR1B = (1 << TXEN1);\r
+       UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
+\r
+       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
+       XPROGTarget_SendBreak();\r
+       XPROGTarget_SendBreak();\r
+#else\r
+       /* Set DATA and CLOCK lines to outputs */\r
+       BITBANG_TPIDATA_DDR  |= BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;\r
+       \r
+       /* Set DATA line high for idle state */\r
+       BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
+\r
+       /* Fire timer capture ISR every 100 cycles to manage the software USART */\r
+       OCR1A   = 100;\r
+       TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);\r
+       TIMSK1  = (1 << ICIE1);\r
+       \r
+       /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
+       XPROGTarget_SendBreak();\r
+       XPROGTarget_SendBreak();\r
+#endif\r
+}\r
+\r

 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */\r
 /** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */\r

-void PDITarget_EnableTargetPDI(void)\r
+void XPROGTarget_EnableTargetPDI(void)\r

 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Set Tx and XCK as outputs, Rx as input */\r
 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Set Tx and XCK as outputs, Rx as input */\r


@@ -116,8 +204,8 @@ void PDITarget_EnableTargetPDI(void)
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 \r
        /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 \r
        /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r

-       PDITarget_SendBreak();\r
-       PDITarget_SendBreak();\r
+       XPROGTarget_SendBreak();\r
+       XPROGTarget_SendBreak();\r

 #else\r
        /* Set DATA and CLOCK lines to outputs */\r
        BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
 #else\r
        /* Set DATA and CLOCK lines to outputs */\r
        BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r


@@ -129,18 +217,45 @@ void PDITarget_EnableTargetPDI(void)
        asm volatile ("NOP"::);\r
 \r
        /* Fire timer compare ISR every 100 cycles to manage the software USART */\r
        asm volatile ("NOP"::);\r
 \r
        /* Fire timer compare ISR every 100 cycles to manage the software USART */\r

-       OCR1A   = 80;\r
+       OCR1A   = 100;\r

        TCCR1B  = (1 << WGM12) | (1 << CS10);\r
        TIMSK1  = (1 << OCIE1A);\r
        \r
        /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
        TCCR1B  = (1 << WGM12) | (1 << CS10);\r
        TIMSK1  = (1 << OCIE1A);\r
        \r
        /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r

-       PDITarget_SendBreak();\r
-       PDITarget_SendBreak();\r
+       XPROGTarget_SendBreak();\r
+       XPROGTarget_SendBreak();\r
+#endif\r
+}\r
+\r
+/** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
+void XPROGTarget_DisableTargetTPI(void)\r
+{\r
+#if defined(XPROG_VIA_HARDWARE_USART)\r
+       /* Turn off receiver and transmitter of the USART, clear settings */\r
+       UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
+       UCSR1B  = 0;\r
+       UCSR1C  = 0;\r
+\r
+       /* Set all USART lines as input, tristate */\r
+       DDRD  &= ~((1 << 5) | (1 << 3));\r
+       PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
+#else\r
+       /* Set DATA and CLOCK lines to inputs */\r
+       BITBANG_TPIDATA_DDR   &= ~BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_DDR  &= ~BITBANG_TPICLOCK_MASK;\r
+       \r
+       /* Tristate DATA and CLOCK lines */\r
+       BITBANG_TPIDATA_PORT  &= ~BITBANG_TPIDATA_MASK;\r
+       BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;\r

 #endif\r
 #endif\r

+\r
+       /* Tristate target /RESET line */\r
+       RESET_LINE_DDR  &= ~RESET_LINE_MASK;\r
+       RESET_LINE_PORT &= ~RESET_LINE_MASK;\r

 }\r
 \r
 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
 }\r
 \r
 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r

-void PDITarget_DisableTargetPDI(void)\r
+void XPROGTarget_DisableTargetPDI(void)\r

 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Turn off receiver and transmitter of the USART, clear settings */\r
 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Turn off receiver and transmitter of the USART, clear settings */\r


@@ -166,7 +281,7 @@ void PDITarget_DisableTargetPDI(void)
  *\r
  *  \param[in] Byte  Byte to send through the USART\r
  */\r
  *\r
  *  \param[in] Byte  Byte to send through the USART\r
  */\r

-void PDITarget_SendByte(const uint8_t Byte)\r
+void XPROGTarget_SendByte(const uint8_t Byte)\r

 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Switch to Tx mode if currently in Rx mode */\r
 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Switch to Tx mode if currently in Rx mode */\r


@@ -211,7 +326,7 @@ void PDITarget_SendByte(const uint8_t Byte)
 \r
        /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
        SoftUSART_Data     = NewUSARTData;\r
 \r
        /* Data shifted out LSB first, START DATA PARITY STOP STOP */\r
        SoftUSART_Data     = NewUSARTData;\r

-       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
+       SoftUSART_BitCount = BITS_IN_USART_FRAME;\r

 #endif\r
 }\r
 \r
 #endif\r
 }\r
 \r


@@ -219,7 +334,7 @@ void PDITarget_SendByte(const uint8_t Byte)
  *\r
  *  \return Received byte from the USART\r
  */\r
  *\r
  *  \return Received byte from the USART\r
  */\r

-uint8_t PDITarget_ReceiveByte(void)\r
+uint8_t XPROGTarget_ReceiveByte(void)\r

 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Switch to Rx mode if currently in Tx mode */\r
 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Switch to Rx mode if currently in Tx mode */\r


@@ -238,7 +353,7 @@ uint8_t PDITarget_ReceiveByte(void)
        }\r
 \r
        /* Wait until a byte has been received before reading */\r
        }\r
 \r
        /* Wait until a byte has been received before reading */\r

-       while (!(UCSR1A & (1 << RXC1)));\r
+       while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);\r

        return UDR1;\r
 #else\r
        /* Switch to Rx mode if currently in Tx mode */\r
        return UDR1;\r
 #else\r
        /* Switch to Rx mode if currently in Tx mode */\r


@@ -253,16 +368,16 @@ uint8_t PDITarget_ReceiveByte(void)
        }\r
 \r
        /* Wait until a byte has been received before reading */\r
        }\r
 \r
        /* Wait until a byte has been received before reading */\r

-       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
-       while (SoftUSART_BitCount);\r
-       \r
+       SoftUSART_BitCount = BITS_IN_USART_FRAME;\r
+       while (SoftUSART_BitCount && TimeoutMSRemaining);\r
+\r

        /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
        return (uint8_t)SoftUSART_Data;\r
 #endif\r
 }\r
 \r
 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r
        /* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */\r
        return (uint8_t)SoftUSART_Data;\r
 #endif\r
 }\r
 \r
 /** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */\r

-void PDITarget_SendBreak(void)\r
+void XPROGTarget_SendBreak(void)\r

 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Switch to Tx mode if currently in Rx mode */\r
 {\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Switch to Tx mode if currently in Rx mode */\r


@@ -278,7 +393,7 @@ void PDITarget_SendBreak(void)
        }\r
 \r
        /* Need to do nothing for a full frame to send a BREAK */\r
        }\r
 \r
        /* Need to do nothing for a full frame to send a BREAK */\r

-       for (uint8_t i = 0; i < BITS_IN_PDI_FRAME; i++)\r
+       for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)\r

        {\r
                /* Wait for a full cycle of the clock */\r
                while (PIND & (1 << 5));\r
        {\r
                /* Wait for a full cycle of the clock */\r
                while (PIND & (1 << 5));\r


@@ -298,38 +413,8 @@ void PDITarget_SendBreak(void)
 \r
        /* Need to do nothing for a full frame to send a BREAK */\r
        SoftUSART_Data     = 0x0FFF;\r
 \r
        /* Need to do nothing for a full frame to send a BREAK */\r
        SoftUSART_Data     = 0x0FFF;\r

-       SoftUSART_BitCount = BITS_IN_PDI_FRAME;\r
+       SoftUSART_BitCount = BITS_IN_USART_FRAME;\r

 #endif\r
 }\r
 \r
 #endif\r
 }\r
 \r

-/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r
- *  calculation.\r
- *\r
- *  \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
- */\r
-bool PDITarget_WaitWhileNVMBusBusy(void)\r
-{\r
-       TCNT0 = 0;\r
-       TIFR0 = (1 << OCF1A);\r
-                       \r
-       uint8_t TimeoutMS = PDI_NVM_TIMEOUT_MS;\r
-       \r
-       /* Poll the STATUS register to check to see if NVM access has been enabled */\r
-       while (TimeoutMS)\r
-       {\r
-               /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */\r
-               PDITarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);\r
-               if (PDITarget_ReceiveByte() & PDI_STATUS_NVM)\r
-                 return true;\r
-\r
-               if (TIFR0 & (1 << OCF1A))\r
-               {\r
-                       TIFR0 = (1 << OCF1A);\r
-                       TimeoutMS--;\r
-               }\r
-       }\r
-       \r
-       return false;\r
-}\r
-\r

 #endif\r
 #endif\r