Update UC3 platform driver support to use the bitmasks defined in the header files...
[pub/USBasp.git] / LUFA / Platform / UC3 / ClockManagement.h
index 6087020..d6fac35 100644 (file)
 #define _UC3_CLOCK_MANAGEMENT_H_\r
 \r
        /* Includes: */\r
-               #include <avr32/io.h>\r
-               #include <stdbool.h>\r
-               #include <stdint.h>\r
-\r
                #include <LUFA/Common/Common.h>\r
 \r
        /* Enable C linkage for C++ Compilers: */\r
        /* Public Interface - May be used in end-application: */\r
                /* Macros: */\r
                        /** Enum for the possible external oscillator types. */\r
-                       enum Extern_OSC_ClockTypes_t\r
+                       enum UC3_Extern_OSC_ClockTypes_t\r
                        {\r
-                               EXOSC_MODE_CLOCK         = 0, /**< External clock (non-crystal) mode. */\r
-                               EXOSC_MODE_900KHZ_MAX    = 1, /**< External crystal oscillator equal to or slower than 900KHz. */\r
-                               EXOSC_MODE_3MHZ_MAX      = 2, /**< External crystal oscillator equal to or slower than 3MHz. */\r
-                               EXOSC_MODE_8MHZ_MAX      = 3, /**< External crystal oscillator equal to or slower than 8MHz. */\r
-                               EXOSC_MODE_8MHZ_OR_MORE  = 4, /**< External crystal oscillator equal to or faster than 8MHz. */         \r
+                               EXOSC_MODE_CLOCK         = AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK,  /**< External clock (non-crystal) mode. */\r
+                               EXOSC_MODE_900KHZ_MAX    = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0, /**< External crystal oscillator equal to or slower than 900KHz. */\r
+                               EXOSC_MODE_3MHZ_MAX      = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1, /**< External crystal oscillator equal to or slower than 3MHz. */\r
+                               EXOSC_MODE_8MHZ_MAX      = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2, /**< External crystal oscillator equal to or slower than 8MHz. */\r
+                               EXOSC_MODE_8MHZ_OR_MORE  = AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3, /**< External crystal oscillator equal to or faster than 8MHz. */         \r
                        };\r
 \r
                        /** Enum for the possible external oscillator statup times. */\r
-                       enum Extern_OSC_ClockStartup_t\r
+                       enum UC3_Extern_OSC_ClockStartup_t\r
                        {\r
-                               EXOSC_START_0CLK         = 0, /**< Immediate startup, no delay. */\r
-                               EXOSC_START_64CLK        = 1, /**< Wait 64 clock cyles before startup for stability. */\r
-                               EXOSC_START_128CLK       = 2, /**< Wait 128 clock cyles before startup for stability. */\r
-                               EXOSC_START_2048CLK      = 3, /**< Wait 2048 clock cyles before startup for stability. */\r
-                               EXOSC_START_4096CLK      = 4, /**< Wait 4096 clock cyles before startup for stability. */\r
-                               EXOSC_START_8192CLK      = 5, /**< Wait 8192 clock cyles before startup for stability. */\r
-                               EXOSC_START_16384CLK     = 6, /**< Wait 16384 clock cyles before startup for stability. */\r
+                               EXOSC_START_0CLK         = AVR32_PM_OSCCTRL0_STARTUP_0_RCOSC,     /**< Immediate startup, no delay. */\r
+                               EXOSC_START_64CLK        = AVR32_PM_OSCCTRL0_STARTUP_64_RCOSC,    /**< Wait 64 clock cyles before startup for stability. */\r
+                               EXOSC_START_128CLK       = AVR32_PM_OSCCTRL0_STARTUP_128_RCOSC,   /**< Wait 128 clock cyles before startup for stability. */\r
+                               EXOSC_START_2048CLK      = AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC,  /**< Wait 2048 clock cyles before startup for stability. */\r
+                               EXOSC_START_4096CLK      = AVR32_PM_OSCCTRL0_STARTUP_4096_RCOSC,  /**< Wait 4096 clock cyles before startup for stability. */\r
+                               EXOSC_START_8192CLK      = AVR32_PM_OSCCTRL0_STARTUP_8192_RCOSC,  /**< Wait 8192 clock cyles before startup for stability. */\r
+                               EXOSC_START_16384CLK     = AVR32_PM_OSCCTRL0_STARTUP_16384_RCOSC, /**< Wait 16384 clock cyles before startup for stability. */\r
                        };\r
                        \r
                        /** Enum for the possible module clock sources. */\r
-                       enum System_ClockSource_t\r
+                       enum UC3_System_ClockSource_t\r
                        {\r
                                CLOCK_SRC_SLOW_CLK       = 0, /**< Clock sourced from the internal slow clock. */\r
                                CLOCK_SRC_OSC0           = 1, /**< Clock sourced from the Oscillator 0 clock. */\r
                         *  the oscillator is ready for use.\r
                         *\r
                         *  \param[in] Channel  Index of the external oscillator to start.\r
-                        *  \param[in] Type     Type of clock attached to the given oscillator channel, a value from \ref Extern_OSC_ClockTypes_t.\r
-                        *  \param[in] Startup  Statup time of the external oscillator, a value from \ref Extern_OSC_ClockStartup_t.\r
+                        *  \param[in] Type     Type of clock attached to the given oscillator channel, a value from \ref UC3_Extern_OSC_ClockTypes_t.\r
+                        *  \param[in] Startup  Statup time of the external oscillator, a value from \ref UC3_Extern_OSC_ClockStartup_t.\r
                         *\r
                         *  \return Boolean \c true if the external oscillator was successfully started, \c false if invalid parameters specified.\r
                         */\r
                        /** Starts the given PLL of the UC3 microcontroller, with the given options. This routine blocks until the PLL is ready for use.\r
                         *\r
                         *  \param[in] Channel     Index of the PLL to start.\r
-                        *  \param[in] Source      Clock source for the PLL, a value from \ref System_ClockSource_t.\r
+                        *  \param[in] Source      Clock source for the PLL, a value from \ref UC3_System_ClockSource_t.\r
                         *  \param[in] SourceFreq  Frequency of the PLL's clock source, in Hz.\r
                         *  \param[in] Frequency   Target frequency of the PLL's output.\r
                         *\r
                        /** Starts the given Generic Clock of the UC3 microcontroller, with the given options.\r
                         *\r
                         *  \param[in] Channel     Index of the Generic Clock to start.\r
-                        *  \param[in] Source      Clock source for the Generic Clock, a value from \ref System_ClockSource_t.\r
+                        *  \param[in] Source      Clock source for the Generic Clock, a value from \ref UC3_System_ClockSource_t.\r
                         *  \param[in] SourceFreq  Frequency of the Generic Clock's clock source, in Hz.\r
                         *  \param[in] Frequency   Target frequency of the Generic Clock's output.\r
                         *\r
                         *\r
                         *  This function will configure the FLASH controller's wait states automatically to suit the given clock source.\r
                         *\r
-                        *  \param[in] Source      Clock source for the CPU core, a value from \ref System_ClockSource_t.\r
+                        *  \param[in] Source      Clock source for the CPU core, a value from \ref UC3_System_ClockSource_t.\r
                         *  \param[in] SourceFreq  Frequency of the CPU core's clock source, in Hz.\r
                         *\r
                         *  \return Boolean \c true if the CPU core clock was sucessfully altered, \c false if invalid parameters specified.\r