/*\r
LUFA Library\r
- Copyright (C) Dean Camera, 2009.\r
+ Copyright (C) Dean Camera, 2010.\r
\r
dean [at] fourwalledcubicle [dot] com\r
www.fourwalledcubicle.com\r
*/\r
\r
/*\r
- Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+ Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
\r
Permission to use, copy, modify, distribute, and sell this \r
software and its documentation for any purpose is hereby granted\r
return;\r
\r
/* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
- * be discarded leaving the data to be byte-aligned for quick access */\r
+ * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */\r
if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
\r
return;\r
\r
/* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
- * be discarded leaving the data to be byte-aligned for quick access */\r
+ * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */\r
if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
\r
\r
/* Set DATA line high for at least 90ns to disable /RESET functionality */\r
PORTD |= (1 << 3);\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
+ _delay_ms(1);\r
\r
/* Set up the synchronous USART for XMEGA communications - \r
8 data bits, even parity, 2 stop bits */\r
- UBRR1 = (F_CPU / 1000000UL);\r
+ UBRR1 = (F_CPU / 500000UL);\r
UCSR1B = (1 << TXEN1);\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
#else\r
\r
/* Set DATA line high for at least 90ns to disable /RESET functionality */\r
BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
+ _delay_ms(1);\r
\r
/* Fire timer compare channel A ISR to manage the software USART */\r
OCR1A = BITS_BETWEEN_USART_CLOCKS;\r
{\r
IsSending = false;\r
\r
- /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
+ /* Set /RESET line low for at least 400ns to enable TPI functionality */\r
AUX_LINE_DDR |= AUX_LINE_MASK;\r
AUX_LINE_PORT &= ~AUX_LINE_MASK;\r
- asm volatile ("NOP"::);\r
- asm volatile ("NOP"::);\r
+ _delay_ms(1);\r
\r
#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Set Tx and XCK as outputs, Rx as input */\r
DDRD |= (1 << 5) | (1 << 3);\r
DDRD &= ~(1 << 2);\r
\r
- /* Set up the synchronous USART for XMEGA communications - \r
+ /* Set up the synchronous USART for TINY communications - \r
8 data bits, even parity, 2 stop bits */\r
- UBRR1 = (F_CPU / 1000000UL);\r
+ UBRR1 = (F_CPU / 500000UL);\r
UCSR1B = (1 << TXEN1);\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
#else\r
/** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
void XPROGTarget_DisableTargetPDI(void)\r
{\r
+ /* Switch to Rx mode to ensure that all pending transmissions are complete */\r
+ XPROGTarget_SetRxMode();\r
+\r
#if defined(XPROG_VIA_HARDWARE_USART)\r
+ /* Set /RESET high for a one millisecond to ensure target device is restarted */\r
+ PORTD |= (1 << 5);\r
+ _delay_ms(1);\r
+\r
/* Turn off receiver and transmitter of the USART, clear settings */\r
UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
UCSR1B = 0;\r
DDRD &= ~((1 << 5) | (1 << 3));\r
PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
#else\r
+ /* Set /RESET high for a one millisecond to ensure target device is restarted */\r
+ BITBANG_PDICLOCK_PORT |= BITBANG_PDICLOCK_MASK;\r
+ _delay_ms(1);\r
+\r
/* Set DATA and CLOCK lines to inputs */\r
BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;\r
BITBANG_PDICLOCK_DDR &= ~BITBANG_PDICLOCK_MASK;\r
/** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
void XPROGTarget_DisableTargetTPI(void)\r
{\r
+ /* Switch to Rx mode to ensure that all pending transmissions are complete */\r
+ XPROGTarget_SetRxMode();\r
+\r
#if defined(XPROG_VIA_HARDWARE_USART)\r
/* Turn off receiver and transmitter of the USART, clear settings */\r
UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
\r
/* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
- uint8_t ParityData = Byte;\r
+ uint8_t ParityData = Byte;\r
while (ParityData)\r
{\r
NewUSARTData ^= (1 << 9);\r
}\r
\r
/* Wait until DATA line has been pulled up to idle by the target */\r
- while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK));\r
+ while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining);\r
#endif\r
\r
IsSending = false;\r