Oops - PDI handshake delay was too long, causing the device's /RESET functionality...

[pub/USBasp.git] / Projects / AVRISP-MKII / Lib / XPROG / XPROGTarget.c

diff --git a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
index c1f1a63..843bf5a 100644 (file)
--- a/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
+++ b/Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
@@ -1,13 +1,13 @@
 /*\r
              LUFA Library\r
 /*\r
              LUFA Library\r

-     Copyright (C) Dean Camera, 2009.\r
+     Copyright (C) Dean Camera, 2010.\r

               \r
   dean [at] fourwalledcubicle [dot] com\r
       www.fourwalledcubicle.com\r
 */\r
 \r
 /*\r
               \r
   dean [at] fourwalledcubicle [dot] com\r
       www.fourwalledcubicle.com\r
 */\r
 \r
 /*\r

-  Copyright 2009  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
+  Copyright 2010  Dean Camera (dean [at] fourwalledcubicle [dot] com)\r

 \r
   Permission to use, copy, modify, distribute, and sell this \r
   software and its documentation for any purpose is hereby granted\r
 \r
   Permission to use, copy, modify, distribute, and sell this \r
   software and its documentation for any purpose is hereby granted\r


@@ -71,7 +71,7 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r

-                * be discarded leaving the data to be byte-aligned for quick access */\r
+                * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */\r

                if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
                  ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
 \r
                if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)\r
                  ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
 \r


@@ -96,7 +96,7 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
 }\r
 \r
 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */\r
 }\r
 \r
 /** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */\r

-ISR(TIMER1_COMPB_vect, ISR_BLOCK)\r
+ISR(TIMER1_CAPT_vect, ISR_BLOCK)\r

 {\r
        /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
        BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r
 {\r
        /* Toggle CLOCK pin in a single cycle (see AVR datasheet) */\r
        BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;\r


@@ -117,7 +117,7 @@ ISR(TIMER1_COMPB_vect, ISR_BLOCK)
                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r
                  return;\r
        \r
                /* Shift in the bit one less than the frame size in position, so that the start bit will eventually\r

-                * be discarded leaving the data to be byte-aligned for quick access */\r
+                * be discarded leaving the data to be byte-aligned for quick access (subtract 9 as we are ORing to the MSB) */\r

                if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
                 ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
 \r
                if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)\r
                 ((uint8_t*)&SoftUSART_Data)[1] |= (1 << (BITS_IN_USART_FRAME - 9));\r
 \r


@@ -152,14 +152,15 @@ void XPROGTarget_EnableTargetPDI(void)
        DDRD |=  (1 << 5) | (1 << 3);\r
        DDRD &= ~(1 << 2);\r
        \r
        DDRD |=  (1 << 5) | (1 << 3);\r
        DDRD &= ~(1 << 2);\r
        \r

-       /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+       /* Set DATA line high for at least 90ns to disable /RESET functionality (note: too long will enable it again,\r
+        * so a fixed number of NOPs are used here */\r

        PORTD |= (1 << 3);\r
        asm volatile ("NOP"::);\r
        asm volatile ("NOP"::);\r
        \r
        /* Set up the synchronous USART for XMEGA communications - \r
           8 data bits, even parity, 2 stop bits */\r
        PORTD |= (1 << 3);\r
        asm volatile ("NOP"::);\r
        asm volatile ("NOP"::);\r
        \r
        /* Set up the synchronous USART for XMEGA communications - \r
           8 data bits, even parity, 2 stop bits */\r

-       UBRR1  = (F_CPU / 1000000UL);\r
+       UBRR1  = (F_CPU / 500000UL);\r

        UCSR1B = (1 << TXEN1);\r
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 #else\r
        UCSR1B = (1 << TXEN1);\r
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 #else\r


@@ -167,7 +168,8 @@ void XPROGTarget_EnableTargetPDI(void)
        BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
        BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
        \r
        BITBANG_PDIDATA_DDR  |= BITBANG_PDIDATA_MASK;\r
        BITBANG_PDICLOCK_DDR |= BITBANG_PDICLOCK_MASK;\r
        \r

-       /* Set DATA line high for at least 90ns to disable /RESET functionality */\r
+       /* Set DATA line high for at least 90ns to disable /RESET functionality (note: too long will enable it again,\r
+        * so a fixed number of NOPs are used here */\r

        BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
        asm volatile ("NOP"::);\r
        asm volatile ("NOP"::);\r
        BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;\r
        asm volatile ("NOP"::);\r
        asm volatile ("NOP"::);\r


@@ -188,20 +190,19 @@ void XPROGTarget_EnableTargetTPI(void)
 {\r
        IsSending = false;\r
 \r
 {\r
        IsSending = false;\r
 \r

-       /* Set /RESET line low for at least 90ns to enable TPI functionality */\r
+       /* Set /RESET line low for at least 400ns to enable TPI functionality */\r

        AUX_LINE_DDR  |=  AUX_LINE_MASK;\r
        AUX_LINE_PORT &= ~AUX_LINE_MASK;\r
        AUX_LINE_DDR  |=  AUX_LINE_MASK;\r
        AUX_LINE_PORT &= ~AUX_LINE_MASK;\r

-       asm volatile ("NOP"::);\r
-       asm volatile ("NOP"::);\r
+       _delay_ms(1);\r

 \r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Set Tx and XCK as outputs, Rx as input */\r
        DDRD |=  (1 << 5) | (1 << 3);\r
        DDRD &= ~(1 << 2);\r
                \r
 \r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Set Tx and XCK as outputs, Rx as input */\r
        DDRD |=  (1 << 5) | (1 << 3);\r
        DDRD &= ~(1 << 2);\r
                \r

-       /* Set up the synchronous USART for XMEGA communications - \r
+       /* Set up the synchronous USART for TINY communications - \r

           8 data bits, even parity, 2 stop bits */\r
           8 data bits, even parity, 2 stop bits */\r

-       UBRR1  = (F_CPU / 1000000UL);\r
+       UBRR1  = (F_CPU / 500000UL);\r

        UCSR1B = (1 << TXEN1);\r
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 #else\r
        UCSR1B = (1 << TXEN1);\r
        UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
 #else\r


@@ -212,10 +213,10 @@ void XPROGTarget_EnableTargetTPI(void)
        /* Set DATA line high for idle state */\r
        BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
 \r
        /* Set DATA line high for idle state */\r
        BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;\r
 \r

-       /* Fire timer capture channel B ISR to manage the software USART */\r
-       OCR1B   = BITS_BETWEEN_USART_CLOCKS;\r
-       TCCR1B  = (1 << WGM12) | (1 << CS10);\r
-       TIMSK1  = (1 << OCIE1B);\r
+       /* Fire timer capture channel ISR to manage the software USART */\r
+       ICR1    = BITS_BETWEEN_USART_CLOCKS;\r
+       TCCR1B  = (1 << WGM13) | (1 << WGM12) | (1 << CS10);\r
+       TIMSK1  = (1 << ICIE1);\r

 #endif\r
 \r
        /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r
 #endif\r
 \r
        /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */\r


@@ -226,7 +227,14 @@ void XPROGTarget_EnableTargetTPI(void)
 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
 void XPROGTarget_DisableTargetPDI(void)\r
 {\r
 /** Disables the target's PDI interface, exits programming mode and starts the target's application. */\r
 void XPROGTarget_DisableTargetPDI(void)\r
 {\r

+       /* Switch to Rx mode to ensure that all pending transmissions are complete */\r
+       XPROGTarget_SetRxMode();\r
+\r

 #if defined(XPROG_VIA_HARDWARE_USART)\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r

+       /* Set /RESET high for a one millisecond to ensure target device is restarted */\r
+       PORTD |= (1 << 5);\r
+       _delay_ms(1);\r
+\r

        /* Turn off receiver and transmitter of the USART, clear settings */\r
        UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
        UCSR1B  = 0;\r
        /* Turn off receiver and transmitter of the USART, clear settings */\r
        UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
        UCSR1B  = 0;\r


@@ -236,6 +244,10 @@ void XPROGTarget_DisableTargetPDI(void)
        DDRD  &= ~((1 << 5) | (1 << 3));\r
        PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
 #else\r
        DDRD  &= ~((1 << 5) | (1 << 3));\r
        PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));\r
 #else\r

+       /* Set /RESET high for a one millisecond to ensure target device is restarted */\r
+       BITBANG_PDICLOCK_PORT |= BITBANG_PDICLOCK_MASK;\r
+       _delay_ms(1);\r
+\r

        /* Set DATA and CLOCK lines to inputs */\r
        BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;\r
        BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;\r
        /* Set DATA and CLOCK lines to inputs */\r
        BITBANG_PDIDATA_DDR   &= ~BITBANG_PDIDATA_MASK;\r
        BITBANG_PDICLOCK_DDR  &= ~BITBANG_PDICLOCK_MASK;\r


@@ -249,6 +261,9 @@ void XPROGTarget_DisableTargetPDI(void)
 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
 void XPROGTarget_DisableTargetTPI(void)\r
 {\r
 /** Disables the target's TPI interface, exits programming mode and starts the target's application. */\r
 void XPROGTarget_DisableTargetTPI(void)\r
 {\r

+       /* Switch to Rx mode to ensure that all pending transmissions are complete */\r
+       XPROGTarget_SetRxMode();\r
+\r

 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Turn off receiver and transmitter of the USART, clear settings */\r
        UCSR1A |= (1 << TXC1) | (1 << RXC1);\r
 #if defined(XPROG_VIA_HARDWARE_USART)\r
        /* Turn off receiver and transmitter of the USART, clear settings */\r
        UCSR1A |= (1 << TXC1) | (1 << RXC1);\r


@@ -293,7 +308,7 @@ void XPROGTarget_SendByte(const uint8_t Byte)
        uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
 \r
        /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r
        uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));\r
 \r
        /* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */\r

-       uint8_t ParityData    = Byte;\r
+       uint8_t ParityData = Byte;\r

        while (ParityData)\r
        {\r
                NewUSARTData ^= (1 << 9);\r
        while (ParityData)\r
        {\r
                NewUSARTData ^= (1 << 9);\r


@@ -420,7 +435,7 @@ static void XPROGTarget_SetRxMode(void)
        }\r
        \r
        /* Wait until DATA line has been pulled up to idle by the target */\r
        }\r
        \r
        /* Wait until DATA line has been pulled up to idle by the target */\r

-       while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK));\r
+       while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK) && TimeoutMSRemaining);\r

 #endif\r
 \r
        IsSending = false;\r
 #endif\r
 \r
        IsSending = false;\r