-/*\r
- LUFA Library\r
- Copyright (C) Dean Camera, 2010.\r
- \r
- dean [at] fourwalledcubicle [dot] com\r
- www.fourwalledcubicle.com\r
-*/\r
-\r
-/*\r
- Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)\r
-\r
- Permission to use, copy, modify, distribute, and sell this \r
- software and its documentation for any purpose is hereby granted\r
- without fee, provided that the above copyright notice appear in \r
- all copies and that both that the copyright notice and this\r
- permission notice and warranty disclaimer appear in supporting \r
- documentation, and that the name of the author not be used in \r
- advertising or publicity pertaining to distribution of the \r
- software without specific, written prior permission.\r
-\r
- The author disclaim all warranties with regard to this\r
- software, including all implied warranties of merchantability\r
- and fitness. In no event shall the author be liable for any\r
- special, indirect or consequential damages or any damages\r
- whatsoever resulting from loss of use, data or profits, whether\r
- in an action of contract, negligence or other tortious action,\r
- arising out of or in connection with the use or performance of\r
- this software.\r
-*/\r
-\r
-/** \file\r
- *\r
- * Target-related functions for the XMEGA target's NVM module.\r
- */\r
-\r
-#define INCLUDE_FROM_XMEGA_NVM_C\r
-#include "XMEGANVM.h"\r
-\r
-#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)\r
-\r
-/** Sends the given 32-bit absolute address to the target.\r
- *\r
- * \param[in] AbsoluteAddress Absolute address to send to the target\r
- */\r
-static void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)\r
-{\r
- /* Send the given 32-bit address to the target, LSB first */\r
- XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[0]);\r
- XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[1]);\r
- XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[2]);\r
- XPROGTarget_SendByte(((uint8_t*)&AbsoluteAddress)[3]);\r
-}\r
-\r
-/** Sends the given NVM register address to the target.\r
- *\r
- * \param[in] Register NVM register whose absolute address is to be sent\r
- */\r
-static void XMEGANVM_SendNVMRegAddress(const uint8_t Register)\r
-{\r
- /* Determine the absolute register address from the NVM base memory address and the NVM register address */\r
- uint32_t Address = XPROG_Param_NVMBase | Register;\r
-\r
- /* Send the calculated 32-bit address to the target, LSB first */\r
- XMEGANVM_SendAddress(Address);\r
-}\r
-\r
-/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC\r
- * calculation.\r
- *\r
- * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
- */\r
-bool XMEGANVM_WaitWhileNVMBusBusy(void)\r
-{\r
- /* Poll the STATUS register to check to see if NVM access has been enabled */\r
- while (TimeoutMSRemaining)\r
- {\r
- /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */\r
- XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);\r
- if (XPROGTarget_ReceiveByte() & PDI_STATUS_NVM)\r
- {\r
- TimeoutMSRemaining = COMMAND_TIMEOUT_MS;\r
- return true;\r
- }\r
- }\r
- \r
- return false;\r
-}\r
-\r
-/** Waits while the target's NVM controller is busy performing an operation, exiting if the\r
- * timeout period expires.\r
- *\r
- * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise\r
- */\r
-bool XMEGANVM_WaitWhileNVMControllerBusy(void)\r
-{\r
- /* Poll the NVM STATUS register while the NVM controller is busy */\r
- while (TimeoutMSRemaining)\r
- {\r
- /* Send a LDS command to read the NVM STATUS register to check the BUSY flag */\r
- XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);\r
- \r
- /* Check to see if the BUSY flag is still set */\r
- if (!(XPROGTarget_ReceiveByte() & (1 << 7)))\r
- {\r
- TimeoutMSRemaining = COMMAND_TIMEOUT_MS;\r
- return true;\r
- }\r
- }\r
- \r
- return false;\r
-}\r
-\r
-/** Retrieves the CRC value of the given memory space.\r
- *\r
- * \param[in] CRCCommand NVM CRC command to issue to the target\r
- * \param[out] CRCDest CRC Destination when read from the target\r
- *\r
- * \return Boolean true if the command sequence complete successfully\r
- */\r
-bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)\r
-{\r
- /* Wait until the NVM controller is no longer busy */\r
- if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
- return false;\r
- \r
- /* Set the NVM command to the correct CRC read command */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
- XPROGTarget_SendByte(CRCCommand);\r
-\r
- /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);\r
- XPROGTarget_SendByte(1 << 0);\r
-\r
- /* Wait until the NVM bus is ready again */\r
- if (!(XMEGANVM_WaitWhileNVMBusBusy()))\r
- return false;\r
-\r
- /* Wait until the NVM controller is no longer busy */\r
- if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
- return false;\r
- \r
- /* Load the PDI pointer register with the DAT0 register start address */\r
- XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);\r
-\r
- /* Send the REPEAT command to grab the CRC bytes */\r
- XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
- XPROGTarget_SendByte(XMEGA_CRC_LENGTH - 1);\r
- \r
- /* Read in the CRC bytes from the target */\r
- XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
- for (uint8_t i = 0; i < XMEGA_CRC_LENGTH; i++)\r
- ((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte();\r
- \r
- return true;\r
-}\r
-\r
-/** Reads memory from the target's memory spaces.\r
- *\r
- * \param[in] ReadAddress Start address to read from within the target's address space\r
- * \param[out] ReadBuffer Buffer to store read data into\r
- * \param[in] ReadSize Number of bytes to read\r
- *\r
- * \return Boolean true if the command sequence complete successfully\r
- */\r
-bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)\r
-{\r
- /* Wait until the NVM controller is no longer busy */\r
- if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
- return false;\r
- \r
- /* Send the READNVM command to the NVM controller for reading of an arbitrary location */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
- XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM);\r
-\r
- /* Load the PDI pointer register with the start address we want to read from */\r
- XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
- XMEGANVM_SendAddress(ReadAddress);\r
-\r
- /* Send the REPEAT command with the specified number of bytes to read */\r
- XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
- XPROGTarget_SendByte(ReadSize - 1);\r
- \r
- /* Send a LD command with indirect access and postincrement to read out the bytes */\r
- XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
- while (ReadSize--)\r
- *(ReadBuffer++) = XPROGTarget_ReceiveByte();\r
- \r
- return true;\r
-}\r
-\r
-/** Writes byte addressed memory to the target's memory spaces.\r
- *\r
- * \param[in] WriteCommand Command to send to the device to write each memory byte\r
- * \param[in] WriteAddress Address to write to within the target's address space\r
- * \param[in] Byte Byte to write to the target\r
- *\r
- * \return Boolean true if the command sequence complete successfully\r
- */\r
-bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t Byte)\r
-{\r
- /* Wait until the NVM controller is no longer busy */\r
- if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
- return false;\r
-\r
- /* Send the memory write command to the target */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
- XPROGTarget_SendByte(WriteCommand);\r
- \r
- /* Send new memory byte to the memory to the target */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendAddress(WriteAddress);\r
- XPROGTarget_SendByte(Byte);\r
- \r
- return true;\r
-}\r
-\r
-/** Writes page addressed memory to the target's memory spaces.\r
- *\r
- * \param[in] WriteBuffCommand Command to send to the device to write a byte to the memory page buffer\r
- * \param[in] EraseBuffCommand Command to send to the device to erase the memory page buffer\r
- * \param[in] WritePageCommand Command to send to the device to write the page buffer to the destination memory\r
- * \param[in] PageMode Bitfield indicating what operations need to be executed on the specified page\r
- * \param[in] WriteAddress Start address to write the page data to within the target's address space\r
- * \param[in] WriteBuffer Buffer to source data from\r
- * \param[in] WriteSize Number of bytes to write\r
- *\r
- * \return Boolean true if the command sequence complete successfully\r
- */\r
-bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,\r
- const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,\r
- const uint8_t* WriteBuffer, uint16_t WriteSize)\r
-{\r
- if (PageMode & XPRG_PAGEMODE_ERASE)\r
- {\r
- /* Wait until the NVM controller is no longer busy */\r
- if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
- return false;\r
-\r
- /* Send the memory buffer erase command to the target */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
- XPROGTarget_SendByte(EraseBuffCommand);\r
-\r
- /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);\r
- XPROGTarget_SendByte(1 << 0);\r
- }\r
-\r
- if (WriteSize)\r
- {\r
- /* Wait until the NVM controller is no longer busy */\r
- if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
- return false;\r
-\r
- /* Send the memory buffer write command to the target */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
- XPROGTarget_SendByte(WriteBuffCommand);\r
-\r
- /* Load the PDI pointer register with the start address we want to write to */\r
- XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);\r
- XMEGANVM_SendAddress(WriteAddress);\r
-\r
- /* Send the REPEAT command with the specified number of bytes to write */\r
- XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);\r
- XPROGTarget_SendByte(WriteSize - 1);\r
- \r
- /* Send a ST command with indirect access and postincrement to write the bytes */\r
- XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);\r
- while (WriteSize--)\r
- XPROGTarget_SendByte(*(WriteBuffer++));\r
- }\r
- \r
- if (PageMode & XPRG_PAGEMODE_WRITE)\r
- {\r
- /* Wait until the NVM controller is no longer busy */\r
- if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
- return false;\r
-\r
- /* Send the memory write command to the target */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
- XPROGTarget_SendByte(WritePageCommand);\r
- \r
- /* Send the address of the first page location to write the memory page */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendAddress(WriteAddress);\r
- XPROGTarget_SendByte(0x00);\r
- }\r
-\r
- return true;\r
-}\r
-\r
-/** Erases a specific memory space of the target.\r
- *\r
- * \param[in] EraseCommand NVM erase command to send to the device\r
- * \param[in] Address Address inside the memory space to erase\r
- *\r
- * \return Boolean true if the command sequence complete successfully\r
- */\r
-bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)\r
-{\r
- /* Wait until the NVM controller is no longer busy */\r
- if (!(XMEGANVM_WaitWhileNVMControllerBusy()))\r
- return false;\r
- \r
- /* Send the memory erase command to the target */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);\r
- XPROGTarget_SendByte(EraseCommand);\r
- \r
- /* Chip erase is handled separately, since it's procedure is different to other erase types */\r
- if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)\r
- {\r
- /* Set CMDEX bit in NVM CTRLA register to start the chip erase */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);\r
- XPROGTarget_SendByte(1 << 0); \r
- }\r
- else\r
- {\r
- /* Other erase modes just need us to address a byte within the target memory space */\r
- XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));\r
- XMEGANVM_SendAddress(Address);\r
- XPROGTarget_SendByte(0x00);\r
- }\r
- \r
- /* Wait until the NVM bus is ready again */\r
- if (!(XMEGANVM_WaitWhileNVMBusBusy()))\r
- return false;\r
- \r
- return true;\r
-}\r
-\r
-#endif\r
+/*
+ LUFA Library
+ Copyright (C) Dean Camera, 2011.
+
+ dean [at] fourwalledcubicle [dot] com
+ www.lufa-lib.org
+*/
+
+/*
+ Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com)
+
+ Permission to use, copy, modify, distribute, and sell this
+ software and its documentation for any purpose is hereby granted
+ without fee, provided that the above copyright notice appear in
+ all copies and that both that the copyright notice and this
+ permission notice and warranty disclaimer appear in supporting
+ documentation, and that the name of the author not be used in
+ advertising or publicity pertaining to distribution of the
+ software without specific, written prior permission.
+
+ The author disclaim all warranties with regard to this
+ software, including all implied warranties of merchantability
+ and fitness. In no event shall the author be liable for any
+ special, indirect or consequential damages or any damages
+ whatsoever resulting from loss of use, data or profits, whether
+ in an action of contract, negligence or other tortious action,
+ arising out of or in connection with the use or performance of
+ this software.
+*/
+
+/** \file
+ *
+ * Target-related functions for the XMEGA target's NVM module.
+ */
+
+#define INCLUDE_FROM_XMEGA_NVM_C
+#include "XMEGANVM.h"
+
+#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
+
+/** Sends the given 32-bit absolute address to the target.
+ *
+ * \param[in] AbsoluteAddress Absolute address to send to the target
+ */
+static void XMEGANVM_SendAddress(const uint32_t AbsoluteAddress)
+{
+ /* Send the given 32-bit address to the target, LSB first */
+ XPROGTarget_SendByte(AbsoluteAddress & 0xFF);
+ XPROGTarget_SendByte(AbsoluteAddress >> 8);
+ XPROGTarget_SendByte(AbsoluteAddress >> 16);
+ XPROGTarget_SendByte(AbsoluteAddress >> 24);
+}
+
+/** Sends the given NVM register address to the target.
+ *
+ * \param[in] Register NVM register whose absolute address is to be sent
+ */
+static void XMEGANVM_SendNVMRegAddress(const uint8_t Register)
+{
+ /* Determine the absolute register address from the NVM base memory address and the NVM register address */
+ uint32_t Address = XPROG_Param_NVMBase | Register;
+
+ /* Send the calculated 32-bit address to the target, LSB first */
+ XMEGANVM_SendAddress(Address);
+}
+
+/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
+ * calculation.
+ *
+ * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
+ */
+bool XMEGANVM_WaitWhileNVMBusBusy(void)
+{
+ /* Poll the STATUS register to check to see if NVM access has been enabled */
+ for (;;)
+ {
+ /* Send the LDCS command to read the PDI STATUS register to see the NVM bus is active */
+ XPROGTarget_SendByte(PDI_CMD_LDCS | PDI_STATUS_REG);
+
+ uint8_t StatusRegister = XPROGTarget_ReceiveByte();
+
+ /* We might have timed out waiting for the status register read response, check here */
+ if (TimeoutExpired)
+ return false;
+
+ /* Check the status register read response to see if the NVM bus is enabled */
+ if (StatusRegister & PDI_STATUS_NVM)
+ return true;
+ }
+}
+
+/** Waits while the target's NVM controller is busy performing an operation, exiting if the
+ * timeout period expires.
+ *
+ * \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
+ */
+bool XMEGANVM_WaitWhileNVMControllerBusy(void)
+{
+ /* Preload the pointer register with the NVM STATUS register address to check the BUSY flag */
+ XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_STATUS);
+
+ /* Poll the NVM STATUS register while the NVM controller is busy */
+ for (;;)
+ {
+ /* Fetch the current status value via the pointer register (without auto-increment afterwards) */
+ XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT << 2) | PDI_DATSIZE_1BYTE);
+
+ uint8_t StatusRegister = XPROGTarget_ReceiveByte();
+
+ /* We might have timed out waiting for the status register read response, check here */
+ if (TimeoutExpired)
+ return false;
+
+ /* Check to see if the BUSY flag is still set */
+ if (!(StatusRegister & (1 << 7)))
+ return true;
+ }
+}
+
+/** Enables the physical PDI interface on the target and enables access to the internal NVM controller.
+ *
+ * \return Boolean true if the PDI interface was enabled successfully, false otherwise
+ */
+bool XMEGANVM_EnablePDI(void)
+{
+ /* Enable PDI programming mode with the attached target */
+ XPROGTarget_EnableTargetPDI();
+
+ /* Store the RESET key into the RESET PDI register to keep the XMEGA in reset */
+ XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
+ XPROGTarget_SendByte(PDI_RESET_KEY);
+
+ /* Lower direction change guard time to 0 USART bits */
+ XPROGTarget_SendByte(PDI_CMD_STCS | PDI_CTRL_REG);
+ XPROGTarget_SendByte(0x07);
+
+ /* Enable access to the XPROG NVM bus by sending the documented NVM access key to the device */
+ XPROGTarget_SendByte(PDI_CMD_KEY);
+ for (uint8_t i = sizeof(PDI_NVMENABLE_KEY); i > 0; i--)
+ XPROGTarget_SendByte(PDI_NVMENABLE_KEY[i - 1]);
+
+ /* Wait until the NVM bus becomes active */
+ return XMEGANVM_WaitWhileNVMBusBusy();
+}
+
+/** Removes access to the target's NVM controller and physically disables the target's physical PDI interface. */
+void XMEGANVM_DisablePDI(void)
+{
+ XMEGANVM_WaitWhileNVMBusBusy();
+
+ /* Clear the RESET key in the RESET PDI register to allow the XMEGA to run */
+ XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
+ XPROGTarget_SendByte(0x00);
+
+ /* Do it twice to make sure it takes effect (silicon bug?) */
+ XPROGTarget_SendByte(PDI_CMD_STCS | PDI_RESET_REG);
+ XPROGTarget_SendByte(0x00);
+
+ XPROGTarget_DisableTargetPDI();
+}
+
+/** Retrieves the CRC value of the given memory space.
+ *
+ * \param[in] CRCCommand NVM CRC command to issue to the target
+ * \param[out] CRCDest CRC Destination when read from the target
+ *
+ * \return Boolean true if the command sequence complete successfully
+ */
+bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
+{
+ /* Wait until the NVM controller is no longer busy */
+ if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
+ return false;
+
+ /* Set the NVM command to the correct CRC read command */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(CRCCommand);
+
+ /* Set CMDEX bit in NVM CTRLA register to start the CRC generation */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
+ XPROGTarget_SendByte(1 << 0);
+
+ /* Wait until the NVM bus is ready again */
+ if (!(XMEGANVM_WaitWhileNVMBusBusy()))
+ return false;
+
+ /* Wait until the NVM controller is no longer busy */
+ if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
+ return false;
+
+ /* Load the PDI pointer register with the DAT0 register start address */
+ XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);
+
+ /* Send the REPEAT command to grab the CRC bytes */
+ XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
+ XPROGTarget_SendByte(XMEGA_CRC_LENGTH - 1);
+
+ /* Read in the CRC bytes from the target */
+ XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
+ for (uint8_t i = 0; i < XMEGA_CRC_LENGTH; i++)
+ ((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte();
+
+ return (TimeoutExpired == false);
+}
+
+/** Reads memory from the target's memory spaces.
+ *
+ * \param[in] ReadAddress Start address to read from within the target's address space
+ * \param[out] ReadBuffer Buffer to store read data into
+ * \param[in] ReadSize Number of bytes to read
+ *
+ * \return Boolean true if the command sequence complete successfully
+ */
+bool XMEGANVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
+{
+ /* Wait until the NVM controller is no longer busy */
+ if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
+ return false;
+
+ /* Send the READNVM command to the NVM controller for reading of an arbitrary location */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(XMEGA_NVM_CMD_READNVM);
+
+ /* Load the PDI pointer register with the start address we want to read from */
+ XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
+ XMEGANVM_SendAddress(ReadAddress);
+
+ /* Send the REPEAT command with the specified number of bytes to read */
+ XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
+ XPROGTarget_SendByte(ReadSize - 1);
+
+ /* Send a LD command with indirect access and post-increment to read out the bytes */
+ XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
+ while (ReadSize-- && !(TimeoutExpired))
+ *(ReadBuffer++) = XPROGTarget_ReceiveByte();
+
+ return (TimeoutExpired == false);
+}
+
+/** Writes byte addressed memory to the target's memory spaces.
+ *
+ * \param[in] WriteCommand Command to send to the device to write each memory byte
+ * \param[in] WriteAddress Address to write to within the target's address space
+ * \param[in] Byte Byte to write to the target
+ *
+ * \return Boolean true if the command sequence complete successfully
+ */
+bool XMEGANVM_WriteByteMemory(const uint8_t WriteCommand, const uint32_t WriteAddress, const uint8_t Byte)
+{
+ /* Wait until the NVM controller is no longer busy */
+ if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
+ return false;
+
+ /* Send the memory write command to the target */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(WriteCommand);
+
+ /* Send new memory byte to the memory of the target */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendAddress(WriteAddress);
+ XPROGTarget_SendByte(Byte);
+
+ return true;
+}
+
+/** Writes page addressed memory to the target's memory spaces.
+ *
+ * \param[in] WriteBuffCommand Command to send to the device to write a byte to the memory page buffer
+ * \param[in] EraseBuffCommand Command to send to the device to erase the memory page buffer
+ * \param[in] WritePageCommand Command to send to the device to write the page buffer to the destination memory
+ * \param[in] PageMode Bitfield indicating what operations need to be executed on the specified page
+ * \param[in] WriteAddress Start address to write the page data to within the target's address space
+ * \param[in] WriteBuffer Buffer to source data from
+ * \param[in] WriteSize Number of bytes to write
+ *
+ * \return Boolean true if the command sequence complete successfully
+ */
+bool XMEGANVM_WritePageMemory(const uint8_t WriteBuffCommand, const uint8_t EraseBuffCommand,
+ const uint8_t WritePageCommand, const uint8_t PageMode, const uint32_t WriteAddress,
+ const uint8_t* WriteBuffer, uint16_t WriteSize)
+{
+ if (PageMode & XPRG_PAGEMODE_ERASE)
+ {
+ /* Wait until the NVM controller is no longer busy */
+ if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
+ return false;
+
+ /* Send the memory buffer erase command to the target */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(EraseBuffCommand);
+
+ /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
+ XPROGTarget_SendByte(1 << 0);
+ }
+
+ if (WriteSize)
+ {
+ /* Wait until the NVM controller is no longer busy */
+ if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
+ return false;
+
+ /* Send the memory buffer write command to the target */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(WriteBuffCommand);
+
+ /* Load the PDI pointer register with the start address we want to write to */
+ XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
+ XMEGANVM_SendAddress(WriteAddress);
+
+ /* Send the REPEAT command with the specified number of bytes to write */
+ XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
+ XPROGTarget_SendByte(WriteSize - 1);
+
+ /* Send a ST command with indirect access and post-increment to write the bytes */
+ XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
+ while (WriteSize--)
+ XPROGTarget_SendByte(*(WriteBuffer++));
+ }
+
+ if (PageMode & XPRG_PAGEMODE_WRITE)
+ {
+ /* Wait until the NVM controller is no longer busy */
+ if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
+ return false;
+
+ /* Send the memory write command to the target */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(WritePageCommand);
+
+ /* Send the address of the first page location to write the memory page */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendAddress(WriteAddress);
+ XPROGTarget_SendByte(0x00);
+ }
+
+ return true;
+}
+
+/** Erases a specific memory space of the target.
+ *
+ * \param[in] EraseCommand NVM erase command to send to the device
+ * \param[in] Address Address inside the memory space to erase
+ *
+ * \return Boolean true if the command sequence complete successfully
+ */
+bool XMEGANVM_EraseMemory(const uint8_t EraseCommand, const uint32_t Address)
+{
+ /* Wait until the NVM controller is no longer busy */
+ if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
+ return false;
+
+ /* EEPROM and Chip erasures are triggered differently to FLASH section erasures */
+ if (EraseCommand == XMEGA_NVM_CMD_CHIPERASE)
+ {
+ /* Send the memory erase command to the target */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(EraseCommand);
+
+ /* Set CMDEX bit in NVM CTRLA register to start the erase sequence */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
+ XPROGTarget_SendByte(1 << 0);
+ }
+ else if (EraseCommand == XMEGA_NVM_CMD_ERASEEEPROM)
+ {
+ /* Send the EEPROM page buffer erase command to the target */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(XMEGA_NVM_CMD_ERASEEEPROMPAGEBUFF);
+
+ /* Set CMDEX bit in NVM CTRLA register to start the buffer erase */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
+ XPROGTarget_SendByte(1 << 0);
+
+ /* Wait until the NVM controller is no longer busy */
+ if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
+ return false;
+
+ /* Send the EEPROM memory buffer write command to the target */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(XMEGA_NVM_CMD_LOADEEPROMPAGEBUFF);
+
+ /* Load the PDI pointer register with the EEPROM page start address */
+ XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
+ XMEGANVM_SendAddress(Address);
+
+ /* Send the REPEAT command with the specified number of bytes to write */
+ XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
+ XPROGTarget_SendByte(XPROG_Param_EEPageSize - 1);
+
+ /* Send a ST command with indirect access and post-increment to tag each byte in the EEPROM page buffer */
+ XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
+ for (uint8_t PageByte = 0; PageByte < XPROG_Param_EEPageSize; PageByte++)
+ XPROGTarget_SendByte(0x00);
+
+ /* Send the memory erase command to the target */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(EraseCommand);
+
+ /* Set CMDEX bit in NVM CTRLA register to start the EEPROM erase sequence */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CTRLA);
+ XPROGTarget_SendByte(1 << 0);
+ }
+ else
+ {
+ /* Send the memory erase command to the target */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_CMD);
+ XPROGTarget_SendByte(EraseCommand);
+
+ /* Other erase modes just need us to address a byte within the target memory space */
+ XPROGTarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
+ XMEGANVM_SendAddress(Address);
+ XPROGTarget_SendByte(0x00);
+ }
+
+ /* Wait until the NVM bus is ready again */
+ if (!(XMEGANVM_WaitWhileNVMBusBusy()))
+ return false;
+
+ return true;
+}
+
+#endif
+
projects / pub / USBasp.git / blobdiff