+ /** SPI prescaler mask for SPI_Init(). Divides the system clock by a factor of 4. */\r
+ #define SPI_SPEED_FCPU_DIV_4 0\r
+\r
+ /** SPI prescaler mask for SPI_Init(). Divides the system clock by a factor of 8. */\r
+ #define SPI_SPEED_FCPU_DIV_8 (SPI_USE_DOUBLESPEED | (1 << SPR0))\r
+\r
+ /** SPI prescaler mask for SPI_Init(). Divides the system clock by a factor of 16. */\r
+ #define SPI_SPEED_FCPU_DIV_16 (1 << SPR0)\r
+\r
+ /** SPI prescaler mask for SPI_Init(). Divides the system clock by a factor of 32. */\r
+ #define SPI_SPEED_FCPU_DIV_32 (SPI_USE_DOUBLESPEED | (1 << SPR1))\r
+\r
+ /** SPI prescaler mask for SPI_Init(). Divides the system clock by a factor of 64. */\r
+ #define SPI_SPEED_FCPU_DIV_64 (SPI_USE_DOUBLESPEED | (1 << SPR1) | (1 << SPR0))\r
+\r
+ /** SPI prescaler mask for SPI_Init(). Divides the system clock by a factor of 128. */\r
+ #define SPI_SPEED_FCPU_DIV_128 ((1 << SPR1) | (1 << SPR0))\r
+ \r
+ /** SPI clock polarity mask for SPI_Init(). Indicates that the SCK should lead on the rising edge. */\r
+ #define SPI_SCK_LEAD_RISING (0 << CPOL)\r
+\r
+ /** SPI clock polarity mask for SPI_Init(). Indicates that the SCK should lead on the falling edge. */\r
+ #define SPI_SCK_LEAD_FALLING (1 << CPOL)\r
+\r
+ /** SPI data sample mode mask for SPI_Init(). Indicates that the data should sampled on the leading edge. */\r
+ #define SPI_SAMPLE_LEADING (0 << CPHA)\r
+\r
+ /** SPI data sample mode mask for SPI_Init(). Indicates that the data should be sampled on the trailing edge. */\r
+ #define SPI_SAMPLE_TRAILING (1 << CPHA)\r
+ \r
+ /** SPI mode mask for SPI_Init(). Indicates that the SPI interface should be initialized into slave mode. */\r
+ #define SPI_MODE_SLAVE (0 << MSTR)\r
+\r
+ /** SPI mode mask for SPI_Init(). Indicates that the SPI interface should be initialized into master mode. */\r
+ #define SPI_MODE_MASTER (1 << MSTR)\r
+\r
+ /* Inline Functions: */\r
+ /** Initializes the SPI subsystem, ready for transfers. Must be called before calling any other\r
+ * SPI routines.\r
+ *\r
+ * \param[in] SPIOptions SPI Options, a mask consisting of one of each of the SPI_SPEED_*,\r
+ * SPI_SCK_*, SPI_SAMPLE_* and SPI_MODE_* masks\r
+ */\r
+ static inline void SPI_Init(const uint8_t SPIOptions)\r
+ {\r
+ DDRB |= ((1 << 1) | (1 << 2));\r
+ PORTB |= ((1 << 0) | (1 << 3));\r
+ \r
+ SPCR = ((1 << SPE) | SPIOptions);\r
+ \r
+ if (SPIOptions & SPI_USE_DOUBLESPEED)\r
+ SPSR |= (1 << SPI2X);\r
+ else\r
+ SPSR &= ~(1 << SPI2X);\r
+ }\r
+ \r
+ /** Turns off the SPI driver, disabling and returning used hardware to their default configuration. */\r
+ static inline void SPI_ShutDown(void)\r
+ {\r
+ DDRB &= ~((1 << 1) | (1 << 2));\r
+ PORTB &= ~((1 << 0) | (1 << 3));\r
+ \r
+ SPCR = 0;\r
+ SPSR = 0;\r
+ }\r
+ \r
+ /** Sends and receives a byte through the SPI interface, blocking until the transfer is complete.\r
+ *\r
+ * \param[in] Byte Byte to send through the SPI interface\r
+ *\r
+ * \return Response byte from the attached SPI device\r
+ */\r
+ static inline uint8_t SPI_TransferByte(const uint8_t Byte) ATTR_ALWAYS_INLINE;\r
+ static inline uint8_t SPI_TransferByte(const uint8_t Byte)\r
+ {\r
+ SPDR = Byte;\r
+ while (!(SPSR & (1 << SPIF)));\r
+ return SPDR;\r
+ }\r
+\r
+ /** Sends a byte through the SPI interface, blocking until the transfer is complete. The response\r
+ * byte sent to from the attached SPI device is ignored.\r
+ *\r
+ * \param[in] Byte Byte to send through the SPI interface\r
+ */\r
+ static inline void SPI_SendByte(const uint8_t Byte) ATTR_ALWAYS_INLINE;\r
+ static inline void SPI_SendByte(const uint8_t Byte)\r
+ {\r
+ SPDR = Byte;\r
+ while (!(SPSR & (1 << SPIF)));\r
+ }\r
+\r
+ /** Sends a dummy byte through the SPI interface, blocking until the transfer is complete. The response\r
+ * byte from the attached SPI device is returned.\r
+ *\r
+ * \return The response byte from the attached SPI device\r
+ */\r
+ static inline uint8_t SPI_ReceiveByte(void) ATTR_ALWAYS_INLINE ATTR_WARN_UNUSED_RESULT;\r
+ static inline uint8_t SPI_ReceiveByte(void)\r
+ {\r
+ SPDR = 0x00;\r
+ while (!(SPSR & (1 << SPIF)));\r
+ return SPDR;\r
+ }\r