Auto-configure AVRISP programmer configuration when built for the XPLAIN board to...

[pub/USBasp.git] / Projects / AVRISP / AVRISP.txt

diff --git a/Projects/AVRISP/AVRISP.txt b/Projects/AVRISP/AVRISP.txt
index c533af7..bed0a7a 100644 (file)
--- a/Projects/AVRISP/AVRISP.txt
+++ b/Projects/AVRISP/AVRISP.txt
@@ -61,7 +61,11 @@
  *  set to an appropriate ADC channel number in the project makefile for VTARGET detection to operate correctly. On models\r
  *  without an ADC converter, VTARGET will report at a fixed 5V level.\r
  *\r
- *  Connections to the device are simple for SPI programming:\r
+ *  When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the\r
+ *  XPLAIN's XMEGA AVR, and will enable only PDI programming support.\r
+ *\r
+ *\r
+ *  Connections to the device for SPI programming (when enabled):\r
  *\r
  *  <table>\r
  *   <tr>\r
@@ -105,7 +109,7 @@
  *  <b><sup>2</sup></b> <i>See \ref SSec_Options section</i>\r
  *\r
  *\r
- *  Connections to the device are simple for SPI programming:\r
+ *  Connections to the device for PDI programming (when enabled):\r
  *\r
  *  <table>\r
  *   <tr>\r
@@ -158,19 +162,20 @@
  *   <tr>\r
  *    <td>RESET_LINE_PORT</td>\r
  *    <td>Makefile CDEFS</td>\r
- *    <td>PORT register for the programmer's target RESET line.</td>\r
+ *    <td>PORT register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>\r
  *   </tr>\r
  *   <tr>\r
  *    <td>RESET_LINE_DDR</td>\r
  *    <td>Makefile CDEFS</td>\r
- *    <td>DDR register for the programmer's target RESET line.</td>\r
+ *    <td>DDR register for the programmer's target RESET line. <i>Ignored when compiled for the XPLAIN board.</i></td>\r
  *   </tr>\r
  *   <tr>\r
  *    <td>RESET_LINE_MASK</td>\r
  *    <td>Makefile CDEFS</td>\r
  *    <td>Mask for the programmer's target RESET line on the chosen port. <b>Must not be the AVR's /SS pin</b>, as the\r
  *        target pins are tri-stated when not in use, and low signals on the /SS pin will force SPI slave mode when the\r
- *        pin is configured as an input. When in PDI programming mode, this is the target clock pin.</td>\r
+ *        pin is configured as an input. When in PDI programming mode, this is the target clock pin.\r
+ *        <i>Ignored when compiled for the XPLAIN board.</i></td>\r
  *   </tr>\r
  *   <tr>\r
  *    <td>VTARGET_ADC_CHANNEL</td>\r
@@ -180,12 +185,12 @@
  *   <tr>\r
  *    <td>ENABLE_SPI_PROTOCOL</td>\r
  *    <td>Makefile CDEFS</td>\r
- *    <td>Define to enable SPI programming protocol support.</td>  \r
+ *    <td>Define to enable SPI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>  \r
  *   </tr>\r
  *   <tr>\r
  *    <td>ENABLE_XPROG_PROTOCOL</td>\r
  *    <td>Makefile CDEFS</td>\r
- *    <td>Define to enable XMEGA PDI programming protocol support.</td>  \r
+ *    <td>Define to enable XMEGA PDI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>  \r
  *   </tr>\r
  *  </table>\r
  */\r