- /* Clear reception channel ISR flag in case it is pending */
- TIFR1 = (1 << OCF1A);
-
- /* Check that the start bit is still low to prevent noise from triggering a reception */
- if (!(SRXPIN & (1 << SRX)))
- {
- /* Still low, enable both send and receive channels */
- TIMSK1 = (1 << OCIE1A) | (1 << OCIE1B);
-
- /* Clear the start bit detection ISR flag if it is pending */
- EIMSK &= ~(1 << INT0);
- }
+ /* Clear reception channel ISR flag and enable the bit reception ISR */
+ TIFR1 = (1 << OCF1A);
+ TIMSK1 = (1 << OCIE1A);
+
+ /* Disable start bit detection ISR while the next byte is received */
+ EIMSK &= ~(1 << INT0);