Fix PDI code - must send NVM enable key least significant byte first, need to make...

[pub/USBasp.git] / Projects / AVRISP / Lib / PDITarget.c

diff --git a/Projects/AVRISP/Lib/PDITarget.c b/Projects/AVRISP/Lib/PDITarget.c
index d012a1b..22a4d01 100644 (file)
--- a/Projects/AVRISP/Lib/PDITarget.c
+++ b/Projects/AVRISP/Lib/PDITarget.c
@@ -38,8 +38,9 @@
 #define  INCLUDE_FROM_PDITARGET_C\r
 #include "PDITarget.h"\r
 \r
 #define  INCLUDE_FROM_PDITARGET_C\r
 #include "PDITarget.h"\r
 \r

-#if !defined(PDI_VIA_HARDWARE_USART)\r

 volatile bool     IsSending;\r
 volatile bool     IsSending;\r

+\r
+#if !defined(PDI_VIA_HARDWARE_USART)\r

 volatile uint16_t DataBits;\r
 volatile uint8_t  BitCount;\r
 \r
 volatile uint16_t DataBits;\r
 volatile uint8_t  BitCount;\r
 \r


@@ -192,31 +193,60 @@ void PDITarget_DisableTargetPDI(void)
 \r
 void PDITarget_SendByte(uint8_t Byte)\r
 {\r
 \r
 void PDITarget_SendByte(uint8_t Byte)\r
 {\r

-       UCSR1B &= ~(1 << RXEN1);\r
-       UCSR1B |=  (1 << TXEN1);\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               PORTD  |=  (1 << 3);\r
+               DDRD   |=  (1 << 3);\r

 \r
 \r

+               UCSR1B &= ~(1 << RXEN1);\r
+               UCSR1B |=  (1 << TXEN1);\r
+               \r
+               IsSending = true;\r
+       }\r
+       \r
+       /* Wait until there is space in the hardware Tx buffer before writing */\r
+       while (!(UCSR1A & (1 << UDRE1)));\r

        UDR1 = Byte;\r
        UDR1 = Byte;\r

-\r
-       while (!(UCSR1A & (1 << TXC1)));\r
-       UCSR1A |=  (1 << TXC1);\r

 }\r
 \r
 uint8_t PDITarget_ReceiveByte(void)\r
 {\r
 }\r
 \r
 uint8_t PDITarget_ReceiveByte(void)\r
 {\r

-       UCSR1B &= ~(1 << TXEN1);\r
-       UCSR1B |=  (1 << RXEN1);\r
+       /* Switch to Rx mode if currently in Tx mode */\r
+       if (IsSending)\r
+       {\r
+               while (!(UCSR1A & (1 << TXC1)));\r
+               UCSR1A |=  (1 << TXC1);\r

 \r
 \r

+               UCSR1B &= ~(1 << TXEN1);\r
+               UCSR1B |=  (1 << RXEN1);\r
+\r
+               DDRD   &= ~(1 << 3);\r
+               PORTD  &= ~(1 << 3);\r
+               \r
+               IsSending = false;\r
+       }\r
+\r
+       /* Wait until a byte has been received before reading */\r

        while (!(UCSR1A & (1 << RXC1)));\r
        while (!(UCSR1A & (1 << RXC1)));\r

-       UCSR1A |=  (1 << RXC1);\r
-       \r

        return UDR1;\r
 }\r
 \r
 void PDITarget_SendBreak(void)\r
 {\r
        return UDR1;\r
 }\r
 \r
 void PDITarget_SendBreak(void)\r
 {\r

-       UCSR1B &= ~(1 << RXEN1);\r
-       UCSR1B |=  (1 << TXEN1);\r
+       /* Switch to Tx mode if currently in Rx mode */\r
+       if (!(IsSending))\r
+       {\r
+               PORTD  |=  (1 << 3);\r
+               DDRD   |=  (1 << 3);\r
+\r
+               UCSR1B &= ~(1 << RXEN1);\r
+               UCSR1B |=  (1 << TXEN1);\r
+               \r
+               IsSending = true;\r
+       }\r

 \r
 \r

+       /* Need to do nothing for a full frame to send a BREAK */\r

        for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)\r
        {\r
                /* Wait for rising edge of clock */\r
        for (uint8_t i = 0; i <= BITS_IN_FRAME; i++)\r
        {\r
                /* Wait for rising edge of clock */\r