#include "../HighLevel/USBTask.h"\r
\r
#if !defined(NO_STREAM_CALLBACKS) || defined(__DOXYGEN__)\r
- #include "StreamCallbacks.h"\r
+ #include "StreamCallbacks.h"\r
#endif\r
+ \r
/* Enable C linkage for C++ Compilers: */\r
#if defined(__cplusplus)\r
extern "C" {\r
/** Endpoint data direction mask for Endpoint_ConfigureEndpoint(). This indicates that the endpoint\r
* should be initialized in the OUT direction - i.e. data flows from host to device.\r
*/\r
- #define ENDPOINT_DIR_OUT 0\r
+ #define ENDPOINT_DIR_OUT (0 << EPDIR)\r
\r
/** Endpoint data direction mask for Endpoint_ConfigureEndpoint(). This indicates that the endpoint\r
* should be initialized in the IN direction - i.e. data flows from device to host.\r
*/\r
- #define ENDPOINT_DIR_IN (1 << EPDIR)\r
+ #define ENDPOINT_DIR_IN (1 << EPDIR)\r
\r
/** Mask for the bank mode selection for the Endpoint_ConfigureEndpoint() macro. This indicates\r
* that the endpoint should have one single bank, which requires less USB FIFO memory but results\r
* in slower transfers as only one USB device (the AVR or the host) can access the endpoint's\r
* bank at the one time.\r
*/\r
- #define ENDPOINT_BANK_SINGLE 0\r
+ #define ENDPOINT_BANK_SINGLE (0 << EPBK0)\r
\r
/** Mask for the bank mode selection for the Endpoint_ConfigureEndpoint() macro. This indicates\r
* that the endpoint should have two banks, which requires more USB FIFO memory but results\r
* in faster transfers as one USB device (the AVR or the host) can access one bank while the other\r
* accesses the second bank.\r
*/\r
- #define ENDPOINT_BANK_DOUBLE (1 << EPBK0)\r
+ #define ENDPOINT_BANK_DOUBLE (1 << EPBK0)\r
\r
/** Endpoint address for the default control endpoint, which always resides in address 0. This is\r
* defined for convenience to give more readable code when used with the endpoint macros.\r
*/\r
- #define ENDPOINT_CONTROLEP 0\r
+ #define ENDPOINT_CONTROLEP 0\r
\r
/** Default size of the default control endpoint's bank, until altered by the Endpoint0Size value \r
* in the device descriptor. Not available if the FIXED_CONTROL_ENDPOINT_SIZE token is defined.\r
*/\r
#if (!defined(FIXED_CONTROL_ENDPOINT_SIZE) || defined(__DOXYGEN__))\r
- #define ENDPOINT_CONTROLEP_DEFAULT_SIZE 8\r
+ #define ENDPOINT_CONTROLEP_DEFAULT_SIZE 8\r
#endif\r
\r
/** Endpoint number mask, for masking against endpoint addresses to retrieve the endpoint's\r
* numerical address in the device.\r
*/\r
- #define ENDPOINT_EPNUM_MASK 0b111\r
+ #define ENDPOINT_EPNUM_MASK 0b111\r
\r
/** Endpoint bank size mask, for masking against endpoint addresses to retrieve the endpoint's\r
* bank size in the device.\r
*/\r
- #define ENDPOINT_EPSIZE_MASK 0x7FF\r
+ #define ENDPOINT_EPSIZE_MASK 0x7FF\r
\r
/** Maximum size in bytes of a given endpoint.\r
*\r
* \param n Endpoint number, a value between 0 and (ENDPOINT_TOTAL_ENDPOINTS - 1)\r
*/ \r
- #define ENDPOINT_MAX_SIZE(n) _ENDPOINT_GET_MAXSIZE(n)\r
+ #define ENDPOINT_MAX_SIZE(n) _ENDPOINT_GET_MAXSIZE(n)\r
\r
/** Indicates if the given endpoint supports double banking.\r
*\r
* \param n Endpoint number, a value between 0 and (ENDPOINT_TOTAL_ENDPOINTS - 1)\r
*/ \r
- #define ENDPOINT_DOUBLEBANK_SUPPORTED(n) _ENDPOINT_GET_DOUBLEBANK(n)\r
+ #define ENDPOINT_DOUBLEBANK_SUPPORTED(n) _ENDPOINT_GET_DOUBLEBANK(n)\r
\r
#if defined(USB_FULL_CONTROLLER) || defined(USB_MODIFIED_FULL_CONTROLLER) || defined(__DOXYGEN__)\r
/** Total number of endpoints (including the default control endpoint at address 0) which may\r
* be used in the device. Different USB AVR models support different amounts of endpoints,\r
* this value reflects the maximum number of endpoints for the currently selected AVR model.\r
*/\r
- #define ENDPOINT_TOTAL_ENDPOINTS 7\r
+ #define ENDPOINT_TOTAL_ENDPOINTS 7\r
#else\r
- #define ENDPOINT_TOTAL_ENDPOINTS 5 \r
+ #define ENDPOINT_TOTAL_ENDPOINTS 5 \r
#endif\r
\r
/** Interrupt definition for the endpoint SETUP interrupt (for CONTROL type endpoints). Should be\r
*\r
* This interrupt will fire if enabled on a CONTROL type endpoint if a new control packet is\r
* received from the host.\r
+ *\r
+ * \note This interrupt must be enabled and cleared on *each* endpoint which requires it (after the\r
+ * endpoint is selected), and will fire the common endpoint interrupt vector.\r
+ *\r
+ * \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.\r
*/\r
- #define ENDPOINT_INT_SETUP UEIENX, (1 << RXSTPE), UEINTX, (1 << RXSTPI)\r
+ #define ENDPOINT_INT_SETUP UEIENX, (1 << RXSTPE), UEINTX, (1 << RXSTPI)\r
\r
/** Interrupt definition for the endpoint IN interrupt (for INTERRUPT type endpoints). Should be\r
* used with the USB_INT_* macros located in USBInterrupt.h.\r
* This interrupt will fire if enabled on an INTERRUPT type endpoint if a the endpoint interrupt\r
* period has elapsed and the endpoint is ready for a new packet to be written to its FIFO buffer\r
* (if required).\r
+ *\r
+ * \note This interrupt must be enabled and cleared on *each* endpoint which requires it (after the\r
+ * endpoint is selected), and will fire the common endpoint interrupt vector.\r
+ *\r
+ * \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.\r
*/\r
- #define ENDPOINT_INT_IN UEIENX, (1 << TXINE) , UEINTX, (1 << TXINI)\r
+ #define ENDPOINT_INT_IN UEIENX, (1 << TXINE) , UEINTX, (1 << TXINI)\r
\r
/** Interrupt definition for the endpoint OUT interrupt (for INTERRUPT type endpoints). Should be\r
* used with the USB_INT_* macros located in USBInterrupt.h.\r
* This interrupt will fire if enabled on an INTERRUPT type endpoint if a the endpoint interrupt\r
* period has elapsed and the endpoint is ready for a packet from the host to be read from its\r
* FIFO buffer (if received).\r
+ *\r
+ * \note This interrupt must be enabled and cleared on *each* endpoint which requires it (after the\r
+ * endpoint is selected), and will fire the common endpoint interrupt vector.\r
+ *\r
+ * \see ENDPOINT_PIPE_vect for more information on the common pipe and endpoint interrupt vector.\r
*/\r
- #define ENDPOINT_INT_OUT UEIENX, (1 << RXOUTE), UEINTX, (1 << RXOUTI)\r
+ #define ENDPOINT_INT_OUT UEIENX, (1 << RXOUTE), UEINTX, (1 << RXOUTI)\r
\r
#if defined(USB_FULL_CONTROLLER) || defined(USB_MODIFIED_FULL_CONTROLLER) || defined(__DOXYGEN__)\r
/** Indicates the number of bytes currently stored in the current endpoint's selected bank. */\r
- #define Endpoint_BytesInEndpoint() UEBCX\r
+ #define Endpoint_BytesInEndpoint() UEBCX\r
#else\r
- #define Endpoint_BytesInEndpoint() UEBCLX\r
+ #define Endpoint_BytesInEndpoint() UEBCLX\r
#endif\r
\r
/** Returns the endpoint address of the currently selected endpoint. This is typically used to save\r
* the currently selected endpoint number so that it can be restored after another endpoint has\r
* been manipulated.\r
*/\r
- #define Endpoint_GetCurrentEndpoint() (UENUM & ENDPOINT_EPNUM_MASK)\r
+ #define Endpoint_GetCurrentEndpoint() (UENUM & ENDPOINT_EPNUM_MASK)\r
\r
/** Selects the given endpoint number. If the address from the device descriptors is used, the\r
* value should be masked with the ENDPOINT_EPNUM_MASK constant to extract only the endpoint\r
* Any endpoint operations which do not require the endpoint number to be indicated will operate on\r
* the currently selected endpoint.\r
*/\r
- #define Endpoint_SelectEndpoint(epnum) MACROS{ UENUM = epnum; }MACROE\r
+ #define Endpoint_SelectEndpoint(epnum) MACROS{ UENUM = epnum; }MACROE\r
\r
/** Resets the endpoint bank FIFO. This clears all the endpoint banks and resets the USB controller's\r
* In and Out pointers to the bank's contents.\r
*/\r
- #define Endpoint_ResetFIFO(epnum) MACROS{ UERST = (1 << epnum); UERST = 0; }MACROE\r
+ #define Endpoint_ResetFIFO(epnum) MACROS{ UERST = (1 << epnum); UERST = 0; }MACROE\r
\r
/** Enables the currently selected endpoint so that data can be sent and received through it to\r
* and from a host.\r
* \note Endpoints must first be configured properly rather than just being enabled via the\r
* Endpoint_ConfigureEndpoint() macro, which calls Endpoint_EnableEndpoint() automatically.\r
*/\r
- #define Endpoint_EnableEndpoint() MACROS{ UECONX |= (1 << EPEN); }MACROE\r
+ #define Endpoint_EnableEndpoint() MACROS{ UECONX |= (1 << EPEN); }MACROE\r
\r
/** Disables the currently selected endpoint so that data cannot be sent and received through it\r
* to and from a host.\r
*/\r
- #define Endpoint_DisableEndpoint() MACROS{ UECONX &= ~(1 << EPEN); }MACROE\r
+ #define Endpoint_DisableEndpoint() MACROS{ UECONX &= ~(1 << EPEN); }MACROE\r
\r
/** Returns true if the currently selected endpoint is enabled, false otherwise. */\r
- #define Endpoint_IsEnabled() ((UECONX & (1 << EPEN)) ? true : false)\r
+ #define Endpoint_IsEnabled() ((UECONX & (1 << EPEN)) ? true : false)\r
\r
/** Returns true if the currently selected endpoint may be read from (if data is waiting in the endpoint\r
* bank and the endpoint is an OUT direction, or if the bank is not yet full if the endpoint is an\r
* the endpoint is an OUT direction and no packet has been received, or if the endpoint is an IN\r
* direction and the endpoint bank is full.\r
*/\r
- #define Endpoint_ReadWriteAllowed() ((UEINTX & (1 << RWAL)) ? true : false)\r
+ #define Endpoint_ReadWriteAllowed() ((UEINTX & (1 << RWAL)) ? true : false)\r
\r
/** Returns true if the currently selected endpoint is configured, false otherwise. */\r
- #define Endpoint_IsConfigured() ((UESTA0X & (1 << CFGOK)) ? true : false)\r
+ #define Endpoint_IsConfigured() ((UESTA0X & (1 << CFGOK)) ? true : false)\r
\r
/** Returns a mask indicating which INTERRUPT type endpoints have interrupted - i.e. their\r
* interrupt duration has elapsed. Which endpoints have interrupted can be determined by\r
* masking the return value against (1 << {Endpoint Number}).\r
*/\r
- #define Endpoint_GetEndpointInterrupts() UEINT\r
+ #define Endpoint_GetEndpointInterrupts() UEINT\r
\r
/** Clears the endpoint interrupt flag. This clears the specified endpoint number's interrupt\r
* mask in the endpoint interrupt flag register.\r
*/\r
- #define Endpoint_ClearEndpointInterrupt(n) MACROS{ UEINT &= ~(1 << n); }MACROE\r
+ #define Endpoint_ClearEndpointInterrupt(n) MACROS{ UEINT &= ~(1 << n); }MACROE\r
\r
/** Returns true if the specified endpoint number has interrupted (valid only for INTERRUPT type\r
* endpoints), false otherwise.\r
*/\r
- #define Endpoint_HasEndpointInterrupted(n) ((UEINT & (1 << n)) ? true : false)\r
+ #define Endpoint_HasEndpointInterrupted(n) ((UEINT & (1 << n)) ? true : false)\r
\r
/** Clears the currently selected endpoint bank, and switches to the alternate bank if the currently\r
* selected endpoint is dual-banked. When cleared, this either frees the bank up for the next packet\r
* from the host (if the endpoint is of the OUT direction) or sends the packet contents to the host\r
* (if the endpoint is of the IN direction).\r
*/\r
- #define Endpoint_ClearCurrentBank() MACROS{ UEINTX &= ~(1 << FIFOCON); }MACROE\r
+ #define Endpoint_ClearCurrentBank() MACROS{ UEINTX &= ~(1 << FIFOCON); }MACROE\r
\r
/** Returns true if the current CONTROL type endpoint is ready for an IN packet, false otherwise. */\r
- #define Endpoint_IsSetupINReady() ((UEINTX & (1 << TXINI)) ? true : false)\r
+ #define Endpoint_IsSetupINReady() ((UEINTX & (1 << TXINI)) ? true : false)\r
\r
/** Returns true if the current CONTROL type endpoint is ready for an OUT packet, false otherwise. */\r
- #define Endpoint_IsSetupOUTReceived() ((UEINTX & (1 << RXOUTI)) ? true : false)\r
+ #define Endpoint_IsSetupOUTReceived() ((UEINTX & (1 << RXOUTI)) ? true : false)\r
\r
/** Returns true if the current CONTROL type endpoint is ready for a SETUP packet, false otherwise. */\r
- #define Endpoint_IsSetupReceived() ((UEINTX & (1 << RXSTPI)) ? true : false)\r
+ #define Endpoint_IsSetupReceived() ((UEINTX & (1 << RXSTPI)) ? true : false)\r
\r
/** Clears a received SETUP packet on the currently selected CONTROL type endpoint. */\r
- #define Endpoint_ClearSetupReceived() MACROS{ UEINTX &= ~(1 << RXSTPI); }MACROE\r
+ #define Endpoint_ClearSetupReceived() MACROS{ UEINTX &= ~(1 << RXSTPI); }MACROE\r
\r
/** Sends an IN packet to the host on the currently selected CONTROL type endpoint. */\r
- #define Endpoint_ClearSetupIN() MACROS{ UEINTX &= ~(1 << TXINI); }MACROE\r
+ #define Endpoint_ClearSetupIN() MACROS{ UEINTX &= ~(1 << TXINI); }MACROE\r
\r
- /** Acknowedges an OUT packet to the host on the currently selected CONTROL type endpoint, freeing\r
+ /** Acknowledges an OUT packet to the host on the currently selected CONTROL type endpoint, freeing\r
* up the endpoint for the next packet.\r
*/\r
- #define Endpoint_ClearSetupOUT() MACROS{ UEINTX &= ~(1 << RXOUTI); }MACROE\r
+ #define Endpoint_ClearSetupOUT() MACROS{ UEINTX &= ~(1 << RXOUTI); }MACROE\r
\r
/** Stalls the current endpoint, indicating to the host that a logical problem occured with the\r
* indicated endpoint and that the current transfer sequence should be aborted. This provides a\r
* is called, or the host issues a CLEAR FEATURE request to the device for the currently selected\r
* endpoint.\r
*/\r
- #define Endpoint_StallTransaction() MACROS{ UECONX |= (1 << STALLRQ); }MACROE\r
+ #define Endpoint_StallTransaction() MACROS{ UECONX |= (1 << STALLRQ); }MACROE\r
\r
/** Clears the stall on the currently selected endpoint. */\r
- #define Endpoint_ClearStall() MACROS{ UECONX |= (1 << STALLRQC); }MACROE\r
+ #define Endpoint_ClearStall() MACROS{ UECONX |= (1 << STALLRQC); }MACROE\r
\r
/** Returns true if the currently selected endpoint is stalled, false othewise. */\r
- #define Endpoint_IsStalled() ((UECONX & (1 << STALLRQ)) ? true : false)\r
+ #define Endpoint_IsStalled() ((UECONX & (1 << STALLRQ)) ? true : false)\r
\r
/** Resets the data toggle of the currently selected endpoint. */\r
- #define Endpoint_ResetDataToggle() MACROS{ UECONX |= (1 << RSTDT); }MACROE\r
+ #define Endpoint_ResetDataToggle() MACROS{ UECONX |= (1 << RSTDT); }MACROE\r
\r
/* Enums: */\r
/** Enum for the possible error return codes of the Endpoint_WaitUntilReady function */\r
\r
/* Inline Functions: */\r
/** Reads one byte from the currently selected endpoint's bank, for OUT direction endpoints. */\r
- static inline uint8_t Endpoint_Read_Byte(void) ATTR_WARN_UNUSED_RESULT;\r
+ static inline uint8_t Endpoint_Read_Byte(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;\r
static inline uint8_t Endpoint_Read_Byte(void)\r
{\r
return UEDATX;\r
}\r
\r
/** Writes one byte from the currently selected endpoint's bank, for IN direction endpoints. */\r
+ static inline void Endpoint_Write_Byte(const uint8_t Byte) ATTR_ALWAYS_INLINE;\r
static inline void Endpoint_Write_Byte(const uint8_t Byte)\r
{\r
UEDATX = Byte;\r
}\r
\r
/** Discards one byte from the currently selected endpoint's bank, for OUT direction endpoints. */\r
+ static inline void Endpoint_Discard_Byte(void) ATTR_ALWAYS_INLINE;\r
static inline void Endpoint_Discard_Byte(void)\r
{\r
uint8_t Dummy;\r
/** Reads two bytes from the currently selected endpoint's bank in little endian format, for OUT\r
* direction endpoints.\r
*/\r
- static inline uint16_t Endpoint_Read_Word_LE(void) ATTR_WARN_UNUSED_RESULT;\r
+ static inline uint16_t Endpoint_Read_Word_LE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;\r
static inline uint16_t Endpoint_Read_Word_LE(void)\r
{\r
uint16_t Data;\r
/** Reads two bytes from the currently selected endpoint's bank in big endian format, for OUT\r
* direction endpoints.\r
*/\r
- static inline uint16_t Endpoint_Read_Word_BE(void) ATTR_WARN_UNUSED_RESULT;\r
+ static inline uint16_t Endpoint_Read_Word_BE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;\r
static inline uint16_t Endpoint_Read_Word_BE(void)\r
{\r
uint16_t Data;\r
/** Writes two bytes to the currently selected endpoint's bank in little endian format, for IN\r
* direction endpoints.\r
*/\r
+ static inline void Endpoint_Write_Word_LE(const uint16_t Word) ATTR_ALWAYS_INLINE;\r
static inline void Endpoint_Write_Word_LE(const uint16_t Word)\r
{\r
UEDATX = (Word & 0xFF);\r
/** Writes two bytes to the currently selected endpoint's bank in big endian format, for IN\r
* direction endpoints.\r
*/\r
+ static inline void Endpoint_Write_Word_BE(const uint16_t Word) ATTR_ALWAYS_INLINE;\r
static inline void Endpoint_Write_Word_BE(const uint16_t Word)\r
{\r
UEDATX = (Word >> 8);\r
}\r
\r
/** Discards two bytes from the currently selected endpoint's bank, for OUT direction endpoints. */\r
+ static inline void Endpoint_Discard_Word(void) ATTR_ALWAYS_INLINE;\r
static inline void Endpoint_Discard_Word(void)\r
{\r
uint8_t Dummy;\r
/** Reads four bytes from the currently selected endpoint's bank in little endian format, for OUT\r
* direction endpoints.\r
*/\r
- static inline uint32_t Endpoint_Read_DWord_LE(void) ATTR_WARN_UNUSED_RESULT;\r
+ static inline uint32_t Endpoint_Read_DWord_LE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;\r
static inline uint32_t Endpoint_Read_DWord_LE(void)\r
{\r
union\r
/** Reads four bytes from the currently selected endpoint's bank in big endian format, for OUT\r
* direction endpoints.\r
*/\r
- static inline uint32_t Endpoint_Read_DWord_BE(void) ATTR_WARN_UNUSED_RESULT;\r
+ static inline uint32_t Endpoint_Read_DWord_BE(void) ATTR_WARN_UNUSED_RESULT ATTR_ALWAYS_INLINE;\r
static inline uint32_t Endpoint_Read_DWord_BE(void)\r
{\r
union\r
/** Writes four bytes to the currently selected endpoint's bank in little endian format, for IN\r
* direction endpoints.\r
*/\r
+ static inline void Endpoint_Write_DWord_LE(const uint32_t DWord) ATTR_ALWAYS_INLINE;\r
static inline void Endpoint_Write_DWord_LE(const uint32_t DWord)\r
{\r
- Endpoint_Write_Word_LE(DWord);\r
- Endpoint_Write_Word_LE(DWord >> 16);\r
+ UEDATX = (DWord & 0xFF);\r
+ UEDATX = (DWord >> 8);\r
+ UEDATX = (DWord >> 16);\r
+ UEDATX = (DWord >> 24);\r
}\r
\r
/** Writes four bytes to the currently selected endpoint's bank in big endian format, for IN\r
* direction endpoints.\r
*/\r
+ static inline void Endpoint_Write_DWord_BE(const uint32_t DWord) ATTR_ALWAYS_INLINE;\r
static inline void Endpoint_Write_DWord_BE(const uint32_t DWord)\r
{\r
- Endpoint_Write_Word_BE(DWord >> 16);\r
- Endpoint_Write_Word_BE(DWord);\r
+ UEDATX = (DWord >> 24);\r
+ UEDATX = (DWord >> 16);\r
+ UEDATX = (DWord >> 8);\r
+ UEDATX = (DWord & 0xFF);\r
}\r
\r
/** Discards four bytes from the currently selected endpoint's bank, for OUT direction endpoints. */\r
+ static inline void Endpoint_Discard_DWord(void) ATTR_ALWAYS_INLINE;\r
static inline void Endpoint_Discard_DWord(void)\r
{\r
uint8_t Dummy;\r
) ATTR_NON_NULL_PTR_ARG(1);\r
\r
/** Writes the given number of bytes to the CONTROL type endpoint from the given buffer in little endian,\r
- * sending full packets to the host as needed. The host OUT acknowedgement is not automatically cleared\r
+ * sending full packets to the host as needed. The host OUT acknowledgement is not automatically cleared\r
* in both failure and success states; the user is responsible for manually clearing the setup OUT to\r
* finalize the transfer via the Endpoint_ClearSetupOUT() macro.\r
*\r
uint8_t Endpoint_Write_Control_Stream_LE(const void* Buffer, uint16_t Length) ATTR_NON_NULL_PTR_ARG(1);\r
\r
/** Writes the given number of bytes to the CONTROL type endpoint from the given buffer in big endian,\r
- * sending full packets to the host as needed. The host OUT acknowedgement is not automatically cleared\r
+ * sending full packets to the host as needed. The host OUT acknowledgement is not automatically cleared\r
* in both failure and success states; the user is responsible for manually clearing the setup OUT to\r
* finalize the transfer via the Endpoint_ClearSetupOUT() macro.\r
*\r
uint8_t Endpoint_Write_Control_Stream_BE(const void* Buffer, uint16_t Length) ATTR_NON_NULL_PTR_ARG(1);\r
\r
/** Reads the given number of bytes from the CONTROL endpoint from the given buffer in little endian,\r
- * discarding fully read packets from the host as needed. The device IN acknowedgement is not\r
+ * discarding fully read packets from the host as needed. The device IN acknowledgement is not\r
* automatically sent after success or failure states; the user is responsible for manually sending the\r
* setup IN to finalize the transfer via the Endpoint_ClearSetupIN() macro.\r
*\r
uint8_t Endpoint_Read_Control_Stream_LE(void* Buffer, uint16_t Length) ATTR_NON_NULL_PTR_ARG(1);\r
\r
/** Reads the given number of bytes from the CONTROL endpoint from the given buffer in big endian,\r
- * discarding fully read packets from the host as needed. The device IN acknowedgement is not\r
+ * discarding fully read packets from the host as needed. The device IN acknowledgement is not\r
* automatically sent after success or failure states; the user is responsible for manually sending the\r
* setup IN to finalize the transfer via the Endpoint_ClearSetupIN() macro.\r
*\r
/* Private Interface - For use in library only: */\r
#if !defined(__DOXYGEN__)\r
/* Macros: */\r
- #define Endpoint_AllocateMemory() MACROS{ UECFG1X |= (1 << ALLOC); }MACROE\r
- #define Endpoint_DeallocateMemory() MACROS{ UECFG1X &= ~(1 << ALLOC); }MACROE\r
+ #define Endpoint_AllocateMemory() MACROS{ UECFG1X |= (1 << ALLOC); }MACROE\r
+ #define Endpoint_DeallocateMemory() MACROS{ UECFG1X &= ~(1 << ALLOC); }MACROE\r
\r
#define _ENDPOINT_GET_MAXSIZE(n) _ENDPOINT_GET_MAXSIZE2(ENDPOINT_DETAILS_EP ## n)\r
#define _ENDPOINT_GET_MAXSIZE2(details) _ENDPOINT_GET_MAXSIZE3(details)\r
bool Endpoint_ConfigureEndpointStatic(const uint8_t Number, const uint8_t UECFG0XData, const uint8_t UECFG1XData);\r
\r
/* Inline Functions: */\r
- static inline uint8_t Endpoint_BytesToEPSizeMask(const uint16_t Bytes) ATTR_WARN_UNUSED_RESULT ATTR_CONST ATTR_ALWAYSINLINE;\r
+ static inline uint8_t Endpoint_BytesToEPSizeMask(const uint16_t Bytes) ATTR_WARN_UNUSED_RESULT ATTR_CONST ATTR_ALWAYS_INLINE;\r
static inline uint8_t Endpoint_BytesToEPSizeMask(const uint16_t Bytes)\r
{\r
if (Bytes <= 8)\r
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