/* Set up the synchronous USART for XMEGA communications - \r
8 data bits, even parity, 2 stop bits */\r
UBRR1 = 10;\r
/* Set up the synchronous USART for XMEGA communications - \r
8 data bits, even parity, 2 stop bits */\r
UBRR1 = 10;\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
\r
/* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);\r
\r
/* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */\r
\r
/* Set all USART lines as input, tristate */\r
DDRD &= ~((1 << 5) | (1 << 3));\r
\r
/* Set all USART lines as input, tristate */\r
DDRD &= ~((1 << 5) | (1 << 3));\r