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Fixed programming errors in the AVRISP-MKII project when the programming packet is...
[pub/USBasp.git]
/
Projects
/
XPLAINBridge
/
Lib
/
SoftUART.c
diff --git
a/Projects/XPLAINBridge/Lib/SoftUART.c
b/Projects/XPLAINBridge/Lib/SoftUART.c
index
4b38a0b
..
1da2236
100644
(file)
--- a/
Projects/XPLAINBridge/Lib/SoftUART.c
+++ b/
Projects/XPLAINBridge/Lib/SoftUART.c
@@
-1,6
+1,6
@@
/*
LUFA Library
/*
LUFA Library
- Copyright (C) Dean Camera, 201
0
.
+ Copyright (C) Dean Camera, 201
1
.
dean [at] fourwalledcubicle [dot] com
www.lufa-lib.org
dean [at] fourwalledcubicle [dot] com
www.lufa-lib.org
@@
-9,7
+9,7
@@
/*
Copyright 2010 David Prentice (david.prentice [at] farming [dot] uk)
Copyright 2010 Peter Danneger
/*
Copyright 2010 David Prentice (david.prentice [at] farming [dot] uk)
Copyright 2010 Peter Danneger
- Copyright 201
0
Dean Camera (dean [at] fourwalledcubicle [dot] com)
+ Copyright 201
1
Dean Camera (dean [at] fourwalledcubicle [dot] com)
Permission to use, copy, modify, distribute, and sell this
software and its documentation for any purpose is hereby granted
Permission to use, copy, modify, distribute, and sell this
software and its documentation for any purpose is hereby granted
@@
-67,11
+67,11
@@
void SoftUART_Init(void)
SoftUART_SetBaud(9600);
/* Setup reception timer compare ISR */
SoftUART_SetBaud(9600);
/* Setup reception timer compare ISR */
- TIMSK1 = (1 <<
ICIE1
);
+ TIMSK1 = (1 <<
OCIE1A
);
/* Setup transmission timer compare ISR and start the timer */
/* Setup transmission timer compare ISR and start the timer */
- TIMSK3 = (1 <<
ICIE3
);
- TCCR3B = ((1 << CS30) | (1 << WGM3
3) | (1 << WGM3
2));
+ TIMSK3 = (1 <<
OCIE3A
);
+ TCCR3B = ((1 << CS30) | (1 << WGM32));
}
/** ISR to detect the start of a bit being sent to the software UART. */
}
/** ISR to detect the start of a bit being sent to the software UART. */
@@
-90,12
+90,12
@@
ISR(INT0_vect, ISR_BLOCK)
EIMSK = 0;
/* Start the reception timer */
EIMSK = 0;
/* Start the reception timer */
- TCCR1B = ((1 << CS10) | (1 << WGM1
3) | (1 << WGM1
2));
+ TCCR1B = ((1 << CS10) | (1 << WGM12));
}
}
/** ISR to manage the reception of bits to the software UART. */
}
}
/** ISR to manage the reception of bits to the software UART. */
-ISR(TIMER1_C
APT
_vect, ISR_BLOCK)
+ISR(TIMER1_C
OMPA
_vect, ISR_BLOCK)
{
/* Cache the current RX pin value for later checking */
uint8_t SRX_Cached = (SRXPIN & (1 << SRX));
{
/* Cache the current RX pin value for later checking */
uint8_t SRX_Cached = (SRXPIN & (1 << SRX));
@@
-125,7
+125,7
@@
ISR(TIMER1_CAPT_vect, ISR_BLOCK)
}
/** ISR to manage the transmission of bits via the software UART. */
}
/** ISR to manage the transmission of bits via the software UART. */
-ISR(TIMER3_C
APT
_vect, ISR_BLOCK)
+ISR(TIMER3_C
OMPA
_vect, ISR_BLOCK)
{
/* Check if transmission has finished */
if (TX_BitsRemaining)
{
/* Check if transmission has finished */
if (TX_BitsRemaining)