/*
LUFA Library
- Copyright (C) Dean Camera, 2010.
+ Copyright (C) Dean Camera, 2011.
dean [at] fourwalledcubicle [dot] com
- www.fourwalledcubicle.com
+ www.lufa-lib.org
*/
/*
- Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
+ Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com)
Permission to use, copy, modify, distribute, and sell this
software and its documentation for any purpose is hereby granted
#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
/** Flag to indicate if the USART is currently in Tx or Rx mode. */
-volatile bool IsSending;
+bool IsSending;
/** Enables the target's PDI interface, holding the target in reset until PDI mode is exited. */
void XPROGTarget_EnableTargetPDI(void)
_delay_us(1);
/* Set up the synchronous USART for XMEGA communications - 8 data bits, even parity, 2 stop bits */
- UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
+ UBRR1 = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1);
UCSR1B = (1 << TXEN1);
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
- /* Send two BREAKs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
- XPROGTarget_SendBreak();
- XPROGTarget_SendBreak();
+ /* Send two IDLEs of 12 bits each to enable PDI interface (need at least 16 idle bits) */
+ XPROGTarget_SendIdle();
+ XPROGTarget_SendIdle();
}
/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
DDRD &= ~(1 << 2);
/* Set up the synchronous USART for TINY communications - 8 data bits, even parity, 2 stop bits */
- UBRR1 = (F_CPU / XPROG_HARDWARE_SPEED);
+ UBRR1 = ((F_CPU / 2 / XPROG_HARDWARE_SPEED) - 1);
UCSR1B = (1 << TXEN1);
UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
- /* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
- XPROGTarget_SendBreak();
- XPROGTarget_SendBreak();
+ /* Send two IDLEs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
+ XPROGTarget_SendIdle();
+ XPROGTarget_SendIdle();
}
/** Disables the target's PDI interface, exits programming mode and starts the target's application. */
UCSR1B = 0;
UCSR1C = 0;
- /* Set all USART lines as input, tristate */
+ /* Set all USART lines as inputs, tristate */
DDRD &= ~((1 << 5) | (1 << 3));
PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
-
+
/* Tristate target /RESET line */
AUX_LINE_DDR &= ~AUX_LINE_MASK;
AUX_LINE_PORT &= ~AUX_LINE_MASK;
UDR1 = Byte;
}
-/** Receives a byte via the software USART, blocking until data is received.
+/** Receives a byte via the hardware USART, blocking until data is received or timeout expired.
*
* \return Received byte from the USART
*/
XPROGTarget_SetRxMode();
/* Wait until a byte has been received before reading */
- while (!(UCSR1A & (1 << RXC1)) && TimeoutTicksRemaining);
+ while (!(UCSR1A & (1 << RXC1)) && !(TimeoutExpired));
return UDR1;
}
-/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
-void XPROGTarget_SendBreak(void)
+/** Sends an IDLE via the USART to the attached target, consisting of a full frame of idle bits. */
+void XPROGTarget_SendIdle(void)
{
/* Switch to Tx mode if currently in Rx mode */
if (!(IsSending))
XPROGTarget_SetTxMode();
-
- /* Need to do nothing for a full frame to send a BREAK */
+
+ /* Need to do nothing for a full frame to send an IDLE */
for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
{
/* Wait for a full cycle of the clock */
static void XPROGTarget_SetTxMode(void)
{
- /* Wait for a full cycle of the clock */
- while (PIND & (1 << 5));
- while (!(PIND & (1 << 5)));
+ /* Need to do nothing for a full frame to send a BREAK - only one cycle should be needed, however
+ * there are reports that sometimes the interface will get stuck in some environments. */
+ for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
+ {
+ /* Wait for a full cycle of the clock */
+ while (PIND & (1 << 5));
+ while (!(PIND & (1 << 5)));
+ }
PORTD |= (1 << 3);
DDRD |= (1 << 3);