/*
LUFA Library
- Copyright (C) Dean Camera, 2010.
-
+ Copyright (C) Dean Camera, 2011.
+
dean [at] fourwalledcubicle [dot] com
- www.fourwalledcubicle.com
+ www.lufa-lib.org
*/
/*
- Copyright 2010 Dean Camera (dean [at] fourwalledcubicle [dot] com)
+ Copyright 2011 Dean Camera (dean [at] fourwalledcubicle [dot] com)
- Permission to use, copy, modify, distribute, and sell this
+ Permission to use, copy, modify, distribute, and sell this
software and its documentation for any purpose is hereby granted
- without fee, provided that the above copyright notice appear in
+ without fee, provided that the above copyright notice appear in
all copies and that both that the copyright notice and this
- permission notice and warranty disclaimer appear in supporting
- documentation, and that the name of the author not be used in
- advertising or publicity pertaining to distribution of the
+ permission notice and warranty disclaimer appear in supporting
+ documentation, and that the name of the author not be used in
+ advertising or publicity pertaining to distribution of the
software without specific, written prior permission.
The author disclaim all warranties with regard to this
bool HardwareSPIMode = true;
/** Software SPI data register for sending and receiving */
-volatile uint8_t SoftSPI_Data;
+static volatile uint8_t SoftSPI_Data;
/** Number of bits left to transfer in the software SPI driver */
-volatile uint8_t SoftSPI_BitsRemaining;
+static volatile uint8_t SoftSPI_BitsRemaining;
/** ISR to handle software SPI transmission and reception */
ISR(TIMER1_COMPA_vect, ISR_BLOCK)
{
+ /* Check if rising edge (output next bit) or falling edge (read in next bit) */
if (!(PINB & (1 << 1)))
{
- if (SoftSPI_Data & 0x80)
+ if (SoftSPI_Data & (1 << 7))
PORTB |= (1 << 2);
else
PORTB &= ~(1 << 2);
TCCR1B = 0;
if (PINB & (1 << 3))
- SoftSPI_Data |= 0x01;
+ SoftSPI_Data |= (1 << 0);
}
- PORTB ^= (1 << 1);
+ /* Fast toggle of PORTB.1 via the PIN register (see datasheet) */
+ PINB |= (1 << 1);
}
-/** Initialises the appropriate SPI driver (hardware or software, depending on the selected ISP speed) ready for
+/** Initializes the appropriate SPI driver (hardware or software, depending on the selected ISP speed) ready for
* communication with the attached target.
*/
-void ISPTarget_Init(void)
+void ISPTarget_EnableTargetISP(void)
{
uint8_t SCKDuration = V2Params_GetParameterValue(PARAM_SCK_DURATION);
else
{
HardwareSPIMode = false;
-
+
DDRB |= ((1 << 1) | (1 << 2));
PORTB |= ((1 << 0) | (1 << 3));
- TIMSK1 = (1 << OCIE1A);
- OCR1A = pgm_read_word(&TimerCompareFromSCKDuration[SCKDuration - sizeof(SPIMaskFromSCKDuration)]);
+ ISPTarget_ConfigureSoftwareSPI(SCKDuration);
}
}
/** Shuts down the current selected SPI driver (hardware or software, depending on the selected ISP speed) so that no
* further communications can occur until the driver is re-initialized.
*/
-void ISPTarget_ShutDown(void)
+void ISPTarget_DisableTargetISP(void)
{
if (HardwareSPIMode)
{
- SPI_ShutDown();
+ SPI_Disable();
}
else
{
DDRB &= ~((1 << 1) | (1 << 2));
- PORTB &= ~((1 << 0) | (1 << 3));
+ PORTB &= ~((1 << 0) | (1 << 3));
+
+ /* Must re-enable rescue clock once software ISP has exited, as the timer for the rescue clock is
+ * re-purposed for software SPI */
+ ISPTarget_ConfigureRescueClock();
}
}
+/** Configures the AVR to produce a 4MHz rescue clock out of the OCR1A pin of the AVR, so
+ * that it can be fed into the XTAL1 pin of an AVR whose fuses have been mis-configured for
+ * an external clock rather than a crystal. When used, the ISP speed must be 125KHz for this
+ * functionality to work correctly.
+ */
+void ISPTarget_ConfigureRescueClock(void)
+{
+ #if defined(XCK_RESCUE_CLOCK_ENABLE)
+ /* Configure XCK as an output for the specified AVR model */
+ DDRD |= (1 << 5);
+
+ /* Start USART to generate a 4MHz clock on the XCK pin */
+ UBRR1 = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
+ UCSR1B = (1 << TXEN1);
+ UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
+ #else
+ /* Configure OCR1A as an output for the specified AVR model */
+ #if defined(USB_SERIES_2_AVR)
+ DDRC |= (1 << 6);
+ #else
+ DDRB |= (1 << 5);
+ #endif
+
+ /* Start Timer 1 to generate a 4MHz clock on the OCR1A pin */
+ TIMSK1 = 0;
+ TCNT1 = 0;
+ OCR1A = ((F_CPU / 2 / ISP_RESCUE_CLOCK_SPEED) - 1);
+ TCCR1A = (1 << COM1A0);
+ TCCR1B = ((1 << WGM12) | (1 << CS10));
+ #endif
+}
+
+/** Configures the AVR's timer ready to produce software SPI for the slower ISP speeds that
+ * cannot be obtained when using the AVR's hardware SPI module.
+ *
+ * \param[in] SCKDuration Duration of the desired software ISP SCK clock
+ */
+void ISPTarget_ConfigureSoftwareSPI(const uint8_t SCKDuration)
+{
+ /* Configure Timer 1 for software SPI using the specified SCK duration */
+ TIMSK1 = (1 << OCIE1A);
+ TCNT1 = 0;
+ OCR1A = pgm_read_word(&TimerCompareFromSCKDuration[SCKDuration - sizeof(SPIMaskFromSCKDuration)]);
+ TCCR1A = 0;
+ TCCR1B = 0;
+}
+
/** Sends and receives a single byte of data to and from the attached target via software SPI.
*
* \param[in] Byte Byte of data to send to the attached target
TCNT1 = 0;
TCCR1B = ((1 << WGM12) | (1 << CS11));
- while (SoftSPI_BitsRemaining && TimeoutTicksRemaining);
+ while (SoftSPI_BitsRemaining && !(TimeoutExpired));
TCCR1B = 0;
-
+
return SoftSPI_Data;
}
if (ResetTarget)
{
AUX_LINE_DDR |= AUX_LINE_MASK;
-
+
if (!(V2Params_GetParameterValue(PARAM_RESET_POLARITY)))
- AUX_LINE_PORT |= AUX_LINE_MASK;
+ AUX_LINE_PORT |= AUX_LINE_MASK;
+ else
+ AUX_LINE_PORT &= ~AUX_LINE_MASK;
}
else
{
ISPTarget_SendByte(0x00);
ISPTarget_SendByte(0x00);
}
- while ((ISPTarget_ReceiveByte() & 0x01) && TimeoutTicksRemaining);
+ while ((ISPTarget_ReceiveByte() & 0x01) && !(TimeoutExpired));
- return TimeoutTicksRemaining ? STATUS_CMD_OK : STATUS_RDY_BSY_TOUT;
+ return (TimeoutExpired) ? STATUS_RDY_BSY_TOUT : STATUS_CMD_OK;
}
/** Sends a low-level LOAD EXTENDED ADDRESS command to the target, for addressing of memory beyond the
ISPTarget_SendByte(LOAD_EXTENDED_ADDRESS_CMD);
ISPTarget_SendByte(0x00);
ISPTarget_SendByte((CurrentAddress & 0x00FF0000) >> 16);
- ISPTarget_SendByte(0x00);
+ ISPTarget_SendByte(0x00);
}
/** Waits until the last issued target memory programming command has completed, via the check mode given and using
const uint8_t DelayMS,
const uint8_t ReadMemCommand)
{
- uint8_t ProgrammingStatus = STATUS_CMD_OK;
+ uint8_t ProgrammingStatus = STATUS_CMD_OK;
/* Determine method of Programming Complete check */
switch (ProgrammingMode & ~(PROG_MODE_PAGED_WRITES_MASK | PROG_MODE_COMMIT_PAGE_MASK))
ISPTarget_SendByte(PollAddress >> 8);
ISPTarget_SendByte(PollAddress & 0xFF);
}
- while ((ISPTarget_TransferByte(0x00) == PollValue) && TimeoutTicksRemaining);
+ while ((ISPTarget_TransferByte(0x00) == PollValue) && !(TimeoutExpired));
- if (!(TimeoutTicksRemaining))
+ if (TimeoutExpired)
ProgrammingStatus = STATUS_CMD_TOUT;
-
- break;
+
+ break;
case PROG_MODE_WORD_READYBUSY_MASK:
case PROG_MODE_PAGED_READYBUSY_MASK:
ProgrammingStatus = ISPTarget_WaitWhileTargetBusy();
}
#endif
+